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SN74LVTH16543

SN74LVTH16543 Series

3.3-V ABT 16-Bit Registered Transceivers With 3-State Outputs

Manufacturer: Texas Instruments

Catalog

3.3-V ABT 16-Bit Registered Transceivers With 3-State Outputs

Key Features

Members of the Texas InstrumentsWidebusTMFamilyState-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power DissipationSupport Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Support Unregulated Battery Operation Down to 2.7 VIoffand Power-Up 3-State Support Hot InsertionBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsTypical VOLP(Output Ground Bounce) < 0.8 V at VCC= 3.3 V, TA= 25°CDistributed VCCand GND Pin Configuration Minimizes High-Speed Switching NoiseFlow-Through Architecture Optimizes PCB LayoutLatch-Up Performance Exceeds 500 mA Per JESD 17ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center SpacingsWidebus is a trademark of Texas Instruments Incorporated.Members of the Texas InstrumentsWidebusTMFamilyState-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power DissipationSupport Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Support Unregulated Battery Operation Down to 2.7 VIoffand Power-Up 3-State Support Hot InsertionBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsTypical VOLP(Output Ground Bounce) < 0.8 V at VCC= 3.3 V, TA= 25°CDistributed VCCand GND Pin Configuration Minimizes High-Speed Switching NoiseFlow-Through Architecture Optimizes PCB LayoutLatch-Up Performance Exceeds 500 mA Per JESD 17ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center SpacingsWidebus is a trademark of Texas Instruments Incorporated.

Description

AI
The 'LVTH16543 devices are 16-bit registered transceivers designed for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch-enable (LEAB\ or LEBA\) and output-enable (OEAB\ or OEBA\) inputs are provided for each register to permit independent control in either direction of data flow. The A-to-B enable (CEAB\) input must be low to enter data from A or to output data from B. If CEAB\ is low and LEAB\ is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB\ puts the A latches in the storage mode. With CEAB\ and OEAB\ both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using the CEBA\, LEBA\, and OEBA\ inputs. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. When VCCis between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. The SN54LVTH16543 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVTH16543 is characterized for operation from -40°C to 85°C. The 'LVTH16543 devices are 16-bit registered transceivers designed for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch-enable (LEAB\ or LEBA\) and output-enable (OEAB\ or OEBA\) inputs are provided for each register to permit independent control in either direction of data flow. The A-to-B enable (CEAB\) input must be low to enter data from A or to output data from B. If CEAB\ is low and LEAB\ is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB\ puts the A latches in the storage mode. With CEAB\ and OEAB\ both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using the CEBA\, LEBA\, and OEBA\ inputs. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. When VCCis between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. The SN54LVTH16543 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVTH16543 is characterized for operation from -40°C to 85°C.