Specification	TLV5619IPW

Architecture	String DAC
Data Interface	Parallel
Differential Output	False
INL/DNL (LSB)	1.5 LSB, 0.4 LSB
Mounting Type	Surface Mount
Number of Bits	12 bits
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Voltage - Buffered
Package / Case	20-TSSOP
Package / Case [x]	0.173 in
Package / Case [y]	4.4 mm
Reference Type	External
Settling Time	3 µs
Supplier Device Package	20-TSSOP
Voltage - Supply, Analog	5 V
Voltage - Supply, Analog [Max]	3.3 V
Voltage - Supply, Analog [Min]	2.7 V
Voltage - Supply, Digital	5 V
Voltage - Supply, Digital [Max]	3.3 V
Voltage - Supply, Digital [Min]	2.7 V

TLV5619-EP Series

Enhanced Product 12-Bit, Single Channel Dac, Parallel, Voltage Out, Low Power

Part	Operating Temperature [Max]	Operating Temperature [Min]	Mounting Type	Voltage - Supply, Analog	Voltage - Supply, Analog [Max]	Voltage - Supply, Analog [Min]	Architecture	INL/DNL (LSB)	Supplier Device Package	Settling Time	Output Type	Reference Type	Data Interface	Package / Case	Package / Case [y]	Package / Case [y]	Voltage - Supply, Digital [Min]	Voltage - Supply, Digital	Voltage - Supply, Digital [Max]	Number of Bits	Package / Case [x]
Texas Instruments TLV5619IDWG4	85 °C	-40 °C	Surface Mount	5 V	3.3 V	2.7 V	String DAC	0.4 LSB 1.5 LSB	20-SOIC	3 µs	Voltage - Buffered	External	Parallel	20-SOIC	0.295 in	7.5 mm	2.7 V	5 V	3.3 V	12 bits
Texas Instruments TLV5619IDWR	85 °C	-40 °C	Surface Mount	5 V	3.3 V	2.7 V	String DAC	0.4 LSB 1.5 LSB	20-SOIC	3 µs	Voltage - Buffered	External	Parallel	20-SOIC	0.295 in	7.5 mm	2.7 V	5 V	3.3 V	12 bits
Texas Instruments TLV5619CDWR	70 °C	0 °C	Surface Mount	5 V	3.3 V	2.7 V	String DAC	0.4 LSB 1.5 LSB	20-SOIC	3 µs	Voltage - Buffered	External	Parallel	20-SOIC	0.295 in	7.5 mm	2.7 V	5 V	3.3 V	12 bits
Texas Instruments TLV5619QDWG4	125 °C	-40 °C	Surface Mount	5 V	3.3 V	2.7 V	String DAC	0.4 LSB 1.5 LSB	20-SOIC	3 µs	Voltage - Buffered	External	Parallel	20-SOIC	0.295 in	7.5 mm	2.7 V	5 V	3.3 V	12 bits
Texas Instruments TLV5619IPWR	85 °C	-40 °C	Surface Mount	5 V	3.3 V	2.7 V	String DAC	0.4 LSB 1.5 LSB	20-TSSOP	3 µs	Voltage - Buffered	External	Parallel	20-TSSOP	4.4 mm		2.7 V	5 V	3.3 V	12 bits	0.173 in
Texas Instruments TLV5619CDW	70 °C	0 °C	Surface Mount	5 V	3.3 V	2.7 V	String DAC	0.4 LSB 1.5 LSB	20-SOIC	3 µs	Voltage - Buffered	External	Parallel	20-SOIC	0.295 in	7.5 mm	2.7 V	5 V	3.3 V	12 bits
Texas Instruments TLV5619IDW	85 °C	-40 °C	Surface Mount	5 V	3.3 V	2.7 V	String DAC	0.4 LSB 1.5 LSB	20-SOIC	3 µs	Voltage - Buffered	External	Parallel	20-SOIC	0.295 in	7.5 mm	2.7 V	5 V	3.3 V	12 bits
Texas Instruments TLV5619IPW	85 °C	-40 °C	Surface Mount	5 V	3.3 V	2.7 V	String DAC	0.4 LSB 1.5 LSB	20-TSSOP	3 µs	Voltage - Buffered	External	Parallel	20-TSSOP	4.4 mm		2.7 V	5 V	3.3 V	12 bits	0.173 in
Texas Instruments TLV5619CPW	70 °C	0 °C	Surface Mount	5 V	3.3 V	2.7 V	String DAC	0.4 LSB 1.5 LSB	20-TSSOP	3 µs	Voltage - Buffered	External	Parallel	20-TSSOP	4.4 mm		2.7 V	5 V	3.3 V	12 bits	0.173 in
Texas Instruments TLV5619QDWREP	125 °C	-40 °C	Surface Mount	5 V	3.3 V	2.7 V	String DAC	0.4 LSB 1.5 LSB	20-SOIC	3 µs	Voltage - Buffered	External	Parallel	20-SOIC	0.295 in	7.5 mm	2.7 V	5 V	3.3 V	12 bits

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Bulk	29	$ 10.48
		29	$ 10.48
	Tube	1	$ 15.17
		1	$ 15.17
		10	$ 13.94
		10	$ 13.94
		70	$ 13.36
		70	$ 13.36
		140	$ 11.77
		140	$ 11.77
		280	$ 11.19
		280	$ 11.19
		560	$ 10.47
		560	$ 10.47
Texas Instruments	TUBE	1	$ 12.75
		100	$ 11.14
		250	$ 8.59
		1000	$ 7.68

Description

General part information

TLV5619-EP Series

The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.

The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.

Documents

Technical documentation and resources

TLV5619 - 2.7 V To 5.5 V 12-Bit Parallel DAC With Power Down datasheet (Rev. F)

Data sheet