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STM32H563ZGT6TR
Integrated Circuits (ICs)

STM32H563ZGT6TR

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STMicroelectronics

HIGH-PERFORMANCE, ARM CORTEX-M33 WITH TRUSTZONE, MCU WITH 1-MBYTE FLASH, 640-KBYTE RAM, 250 MHZ CPU

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STM32H563ZGT6TR
Integrated Circuits (ICs)

STM32H563ZGT6TR

Active
STMicroelectronics

HIGH-PERFORMANCE, ARM CORTEX-M33 WITH TRUSTZONE, MCU WITH 1-MBYTE FLASH, 640-KBYTE RAM, 250 MHZ CPU

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationSTM32H563ZGT6TR
ConnectivitySDIO, SCI, SPI, UART/USART, LINbus, FIFO, SMBus, I2C, IrDA, USB, CANbus
Core ProcessorARM® Cortex®-M33F
Core Size32-Bit
Data ConvertersD/A 2x12b, A/D 20x12b SAR
Mounting TypeSurface Mount
Number of I/O112
Operating Temperature [Max]85 C
Operating Temperature [Min]-40 ¯C
Oscillator TypeExternal, Internal
Package / Case144-LQFP
PeripheralsVoltage Detect, Brown-out Detect/Reset, WDT, SHA, DMA, PWM, POR, PDR, I2S, TRNG
Program Memory Size1 MB
Program Memory TypeFLASH
RAM Size640 K
Speed250 MHz
Supplier Device Package144-LQFP (20x20)
Voltage - Supply (Vcc/Vdd) [Max]3.6 V
Voltage - Supply (Vcc/Vdd) [Min]1.71 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyN/A 0$ 5.03

Description

General part information

STM32H563ZG Series

The STM32H562xx and STM32H563xx devices are high-performance microcontrollers of the STM32H5 series, based on the high-performance Arm®Cortex®-M33 32-bit RISC core. They operate at a frequency of up to 250 MHz.

The Cortex®-M33 core features a single-precision floating-point unit (FPU), which supports all the Arm®single-precision data-processing instructions and all the data types. This core implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) that enhances the application security.

The devices embed high-speed memories (up to 2 Mbytes of dual bank flash memory and 640 Kbytes of SRAM), a flexible external memory controller (FMC) for devices with packages of 100 pins and more, one OCTOSPI memory interface (at least one Quad-SPI available on all packages), and an extensive range of enhanced I/Os and peripherals connected to three APB buses, three AHB buses, and a 32-bit multi-AHB bus matrix.

Documents

Technical documentation and resources