ADF4111 is a RF PLL frequency synthesizer. It can be used to implement local oscillators in the upconversion and down conversion sections of wireless receivers and transmitters. It consist of a low noise digital PFD (phase frequency detector), a precision charge pump, a programmable reference divider, programmable A and B counters, and a dual-modulus prescaler (P/P + 1). The A (6-bit) and B (13-bit) counters, in conjunction with the dual-modulus prescaler (P/P + 1), implement an Ndivider (N = BP + A). In addition, the 14-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). It is widely used in application such as base stations for wireless radio (GSM, PCS, DCS, CDMA, WCDMA), wireless handsets (GSM, PCS, DCS, CDMA, WCDMA), wireless LANS, communications test equipment, CATV equipment etc.