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Texas Instruments-74AHCT16541DGGRG4 Buffers and Line Drivers Buffer/Line Driver 16-CH Non-Inverting 3-ST CMOS 48-Pin TSSOP T/R
Integrated Circuits (ICs)

74LVTH16373DGGRG4

Unknown
Texas Instruments

LATCH TRANSPARENT 3-ST 16-CH D-TYPE 48-PIN TSSOP T/R

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Texas Instruments-74AHCT16541DGGRG4 Buffers and Line Drivers Buffer/Line Driver 16-CH Non-Inverting 3-ST CMOS 48-Pin TSSOP T/R
Integrated Circuits (ICs)

74LVTH16373DGGRG4

Unknown
Texas Instruments

LATCH TRANSPARENT 3-ST 16-CH D-TYPE 48-PIN TSSOP T/R

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

Specification74LVTH16373DGGRG4
Circuit [custom]8
Circuit [custom]8
Current - Output High, Low [custom]64 mA
Current - Output High, Low [custom]32 mA
Delay Time - Propagation2.1 ns
Independent Circuits2
Logic TypeD-Type Transparent Latch
Mounting TypeSurface Mount
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeTri-State
Package / Case48-TFSOP
Package / Case0.24 in
Package / Case [custom]6.1 mm
Supplier Device Package48-TSSOP
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTape & Reel (TR) 2000$ 0.89
6000$ 0.86
10000$ 0.82

Description

General part information

SN74LVTH16373 Series

The 'LVTH16373 devices are 16-bit transparent D-type latches with 3-state outputs designed for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

These devices can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.

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