Specification	SN74LVTH16373DL

Circuit [custom]	8
Circuit [custom]	8
Current - Output High, Low [custom]	64 mA
Current - Output High, Low [custom]	32 mA
Delay Time - Propagation	3 ns
Independent Circuits	2
Logic Type	D-Type Transparent Latch
Mounting Type	Surface Mount
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State
Package / Case	48-BSSOP
Package / Case [y]	0.295 in
Package / Case [y]	7.5 mm
Supplier Device Package	48-SSOP
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	2.7 V

SN74LVTH16373 Series

3.3-V ABT 16-Bit Transparent D-Type Latches With 3-State Outputs

Part	Delay Time - Propagation	Voltage - Supply [Min]	Voltage - Supply [Max]	Output Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Independent Circuits	Operating Temperature [Max]	Operating Temperature [Min]	Supplier Device Package	Logic Type	Mounting Type	Circuit [custom]	Circuit [custom]	Package / Case [y]	Package / Case	Package / Case [y]	Package / Case	Package / Case [custom]	Supplier Device Package [x]	Supplier Device Package [y]
Texas Instruments SN74LVTH16373DL	3 ns	2.7 V	3.6 V	Tri-State	64 mA	32 mA	2	85 °C	-40 °C	48-SSOP	D-Type Transparent Latch	Surface Mount	8	8	0.295 in	48-BSSOP	7.5 mm
Texas Instruments SN74LVTH16373GQLR	3 ns	2.7 V	3.6 V	Tri-State	64 mA	32 mA	2	85 °C	-40 °C	56-BGA Microstar Junior (7x4.5)	D-Type Transparent Latch	Surface Mount	8	8		56-VFBGA
Texas Instruments SN74LVTH16373DLR	3 ns	2.7 V	3.6 V	Tri-State	64 mA	32 mA	2	85 °C	-40 °C	48-SSOP	D-Type Transparent Latch	Surface Mount	8	8	0.295 in	48-BSSOP	7.5 mm
Texas Instruments 74LVTH16373DGGRG4	2.1 ns	2.7 V	3.6 V	Tri-State	64 mA	32 mA	2	85 °C	-40 °C	48-TSSOP	D-Type Transparent Latch	Surface Mount	8	8		48-TFSOP		0.24 in	6.1 mm
Texas Instruments SN74LVTH16373GRDR	3 ns	2.7 V	3.6 V	Tri-State	64 mA	32 mA	2	85 °C	-40 °C	54-BGA Microstar Junior	D-Type Transparent Latch	Surface Mount	8	8		54-TFBGA				8	5.5
Texas Instruments SN74LVTH16373DGGR	3 ns	2.7 V	3.6 V	Tri-State	64 mA	32 mA	2	85 °C	-40 °C	48-TSSOP	D-Type Transparent Latch	Surface Mount	8	8		48-TFSOP		0.24 in	6.1 mm
Texas Instruments SN74LVTH16373ZRDR	3 ns	2.7 V	3.6 V	Tri-State	64 mA	32 mA	2	85 °C	-40 °C	54-BGA Microstar Junior	D-Type Transparent Latch	Surface Mount	8	8		54-TFBGA				8	5.5

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Arrow	N/A	25	$ 1.03
Digikey	Tube	1	$ 3.58
		10	$ 2.35
		25	$ 2.02
		100	$ 1.66
		250	$ 1.48
		500	$ 1.38
		1000	$ 1.29
		2500	$ 1.19
		5000	$ 1.13
Texas Instruments	TUBE	1	$ 1.97
		100	$ 1.63
		250	$ 1.17
		1000	$ 0.88

Description

General part information

SN74LVTH16373 Series

The 'LVTH16373 devices are 16-bit transparent D-type latches with 3-state outputs designed for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

These devices can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.

Documents

Technical documentation and resources

Logic Guide (Rev. AB)

Selection guide

LVT-to-LVTH Conversion

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

LVT Family Characteristics (Rev. A)

Application note

Advanced Bus Interface Logic Selection Guide

Selection guide

SN74LVTH16373DL

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SN74LVTH16373DL

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Technical Specifications

SN74LVTH16373 Series

Pricing

Description

SN74LVTH16373 Series

Documents

Logic Guide (Rev. AB)

LVT-to-LVTH Conversion

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

SN54LVTH16373, SN74LVTH16373 datasheet (Rev. P)

Power-Up Behavior of Clocked Devices (Rev. B)

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

LOGIC Pocket Data Book (Rev. B)

Live Insertion

Understanding Advanced Bus-Interface Products Design Guide

TI IBIS File Creation, Validation, and Distribution Processes

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

An Overview of Bus-Hold Circuit and the Applications (Rev. B)

Implications of Slow or Floating CMOS Inputs (Rev. E)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Input and Output Characteristics of Digital Integrated Circuits

LVT Family Characteristics (Rev. A)

Advanced Bus Interface Logic Selection Guide

SN74LVTH16373 Series