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Technical Specifications
Parameters and characteristics for this part
| Specification | ISO722D |
|---|---|
| Channel Type | Unidirectional |
| Common Mode Transient Immunity (Min) [Min] | 25 kV/µs |
| Data Rate | 100 Mbps |
| Inputs - Side 1/Side 2 [custom] | 0 |
| Inputs - Side 1/Side 2 [custom] | 1 |
| Isolated Power | False |
| Mounting Type | Surface Mount |
| Number of Channels | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 8-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Propagation Delay tpLH / tpHL (Max) [custom] | 24 ns |
| Propagation Delay tpLH / tpHL (Max) [custom] | 24 ns |
| Pulse Width Distortion (Max) [Max] | 2 ns |
| Rise / Fall Time (Typ) [custom] | 1 ns |
| Rise / Fall Time (Typ) [custom] | 1 ns |
| Supplier Device Package | 8-SOIC |
| Technology | Capacitive Coupling |
| Type | General Purpose |
| Voltage - Isolation | 2500 Vrms |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 1 | $ 5.77 | |
| 10 | $ 5.18 | |||
| 75 | $ 4.90 | |||
| 150 | $ 4.25 | |||
| 300 | $ 4.03 | |||
| 525 | $ 3.62 | |||
| 1050 | $ 3.05 | |||
| Texas Instruments | TUBE | 1 | $ 4.83 | |
| 100 | $ 3.99 | |||
| 250 | $ 2.87 | |||
| 1000 | $ 2.16 | |||
Description
General part information
ISO722 Series
The ISO721, ISO721M, ISO722, and ISO722M devices are digital isolators with a logic input and output buffer separated by a silicon dioxide (SiO2) insulation barrier. This barrier provides galvanic isolation of up to 4000VPK per VDE 0884-17. Used in conjunction with isolated power supplies, these devices prevent noise currents on a data bus or other circuits from entering the local ground, and interfering with or damaging sensitive circuitry.
A binary input signal is conditioned, translated to a balanced signal, then differentiated by the isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to provide the proper dc level of the output.
If this dc-refresh pulse is not received for more than 4µs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic-high state.
Documents
Technical documentation and resources
