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SOIC (D)
Isolators

ISO722DR

Active
Texas Instruments

SINGLE-CHANNEL, 100-MBPS DIGITAL ISOLATOR WITH ENABLE

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SOIC (D)
Isolators

ISO722DR

Active
Texas Instruments

SINGLE-CHANNEL, 100-MBPS DIGITAL ISOLATOR WITH ENABLE

Technical Specifications

Parameters and characteristics for this part

SpecificationISO722DR
Channel TypeUnidirectional
Common Mode Transient Immunity (Min) [Min]25 kV/µs
Data Rate100 Mbps
Inputs - Side 1/Side 2 [custom]0
Inputs - Side 1/Side 2 [custom]1
Isolated PowerFalse
Mounting TypeSurface Mount
Number of Channels1
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Package / Case8-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
Propagation Delay tpLH / tpHL (Max) [custom]24 ns
Propagation Delay tpLH / tpHL (Max) [custom]24 ns
Pulse Width Distortion (Max) [Max]2 ns
Rise / Fall Time (Typ) [custom]1 ns
Rise / Fall Time (Typ) [custom]1 ns
Supplier Device Package8-SOIC
TechnologyCapacitive Coupling
TypeGeneral Purpose
Voltage - Isolation2500 Vrms
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 3.11
10$ 2.79
25$ 2.64
100$ 2.29
250$ 2.17
500$ 2.07
Digi-Reel® 1$ 3.11
10$ 2.79
25$ 2.64
100$ 2.29
250$ 2.17
500$ 2.07
Tape & Reel (TR) 2500$ 2.07
Texas InstrumentsLARGE T&R 1$ 2.63
100$ 2.18
250$ 1.56
1000$ 1.18

Description

General part information

ISO722 Series

The ISO721, ISO721M, ISO722, and ISO722M devices are digital isolators with a logic input and output buffer separated by a silicon dioxide (SiO2) insulation barrier. This barrier provides galvanic isolation of up to 4000VPK per VDE 0884-17. Used in conjunction with isolated power supplies, these devices prevent noise currents on a data bus or other circuits from entering the local ground, and interfering with or damaging sensitive circuitry.

A binary input signal is conditioned, translated to a balanced signal, then differentiated by the isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to provide the proper dc level of the output.

If this dc-refresh pulse is not received for more than 4µs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic-high state.