ADS54J64IRMP
ActiveQUAD-CHANNEL, 14-BIT, 1-GSPS, 2X-OVERSAMPLING ANALOG-TO-DIGITAL CONVERTER (ADC)
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ADS54J64IRMP
ActiveQUAD-CHANNEL, 14-BIT, 1-GSPS, 2X-OVERSAMPLING ANALOG-TO-DIGITAL CONVERTER (ADC)
Technical Specifications
Parameters and characteristics for this part
| Specification | ADS54J64IRMP |
|---|---|
| Architecture | Pipelined |
| Configuration | S/H-ADC |
| Data Interface | JESD204B |
| Features | Simultaneous Sampling |
| Input Type | Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 4 |
| Number of Bits | 14 |
| Number of Inputs | 4 |
| Package / Case | 72-VFQFN Exposed Pad |
| Ratio - S/H:ADC | 1:1 |
| Reference Type | Internal |
| Sampling Rate (Per Second) | 1 G |
| Supplier Device Package | 72-VQFN (10x10) |
| Voltage - Supply, Analog [Max] | 2 V, 1.2 V |
| Voltage - Supply, Analog [Min] | 1.1 V, 1.8 V |
| Voltage - Supply, Digital [Max] | 1.2 V |
| Voltage - Supply, Digital [Min] | 1.1 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tray | 1 | $ 715.29 | |
| 10 | $ 704.20 | |||
| Texas Instruments | JEDEC TRAY (5+1) | 1 | $ 636.84 | |
| 100 | $ 576.45 | |||
| 250 | $ 559.98 | |||
| 1000 | $ 549.00 | |||
Description
General part information
ADS54J64 Series
The ADS54J64 device is a quad-channel, 14-bit,1-GSPS, analog-to-digital converter (ADC) offering wide-bandwidth, 2x oversampling and high SNR. The ADS54J64 supports a JESD204B serial interface with data rates up to 10 Gbps with one lane per channel. The buffered analog input provides uniform impedance across a wide frequency range and minimizes sample-and-hold glitch energy. The ADS54J64 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption. The digital signal processing block includes complex mixers followed by low-pass filters with decimate-by-2 and -4 options supporting up to a 200-MHz receive bandwidth. The ADS54J64 also supports a 14-bit, 500-MSPS output in DDC bypass mode.
A four-lane JESD204B interface simplifies connectivity, allowing high system integration density. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 14-bit data from each channel.
The ADS54J64 device is a quad-channel, 14-bit,1-GSPS, analog-to-digital converter (ADC) offering wide-bandwidth, 2x oversampling and high SNR. The ADS54J64 supports a JESD204B serial interface with data rates up to 10 Gbps with one lane per channel. The buffered analog input provides uniform impedance across a wide frequency range and minimizes sample-and-hold glitch energy. The ADS54J64 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption. The digital signal processing block includes complex mixers followed by low-pass filters with decimate-by-2 and -4 options supporting up to a 200-MHz receive bandwidth. The ADS54J64 also supports a 14-bit, 500-MSPS output in DDC bypass mode.
Documents
Technical documentation and resources
