SN74ABT646ADBR
ActiveOCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
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SN74ABT646ADBR
ActiveOCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ABT646ADBR |
|---|---|
| Current - Output High, Low [custom] | 64 mA |
| Current - Output High, Low [custom] | 32 mA |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | 3-State |
| Package / Case | 24-SSOP |
| Supplier Device Package | 24-SSOP |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 1.97 | |
| Digi-Reel® | 1 | $ 1.97 | ||
| Tape & Reel (TR) | 2000 | $ 0.90 | ||
| 6000 | $ 0.87 | |||
| 10000 | $ 0.83 | |||
| Texas Instruments | LARGE T&R | 1 | $ 1.48 | |
| 100 | $ 1.22 | |||
| 250 | $ 0.88 | |||
| 1000 | $ 0.66 | |||
Description
General part information
SN74ABT646A Series
These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ´ABT646.
Output-enable () and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either register or in both.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The direction control (DIR) determines which bus will receive data whenis low. In the isolation mode (high), A data may be stored in one register and/or B data may be stored in the other register.
Documents
Technical documentation and resources
