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8-TSSOP, 8-MSOP
Integrated Circuits (ICs)

SN74LVC2G38DCUT

Active
Texas Instruments

2-CH, 2-INPUT, 1.65-V TO 5.5-V NAND GATES WITH OPEN-DRAIN OUTPUTS

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8-TSSOP, 8-MSOP
Integrated Circuits (ICs)

SN74LVC2G38DCUT

Active
Texas Instruments

2-CH, 2-INPUT, 1.65-V TO 5.5-V NAND GATES WITH OPEN-DRAIN OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC2G38DCUT
Current - Output High, Low [custom]-
Current - Output High, Low [custom]32 mA
Current - Quiescent (Max) [Max]10 µA
FeaturesOpen Drain
Input Logic Level - High [Max]2 V
Input Logic Level - High [Min]1.7 V
Input Logic Level - Low [Max]0.8 V
Input Logic Level - Low [Min]0.7 V
Logic TypeNAND Gate
Max Propagation Delay @ V, Max CL3.9 ns
Mounting TypeSurface Mount
Number of Circuits2
Number of Inputs2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case8-VFSOP
Package / Case [y]2.3 mm
Package / Case [y]0.091 in
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.89
10$ 0.79
25$ 0.75
100$ 0.62
Digi-Reel® 1$ 0.89
10$ 0.79
25$ 0.75
100$ 0.62
Tape & Reel (TR) 250$ 0.58
500$ 0.51
1250$ 0.47
Texas InstrumentsSMALL T&R 1$ 0.93
100$ 0.72
250$ 0.53
1000$ 0.38

Description

General part information

SN74LVC2G38 Series

The SN74LVC2G38 is designed for 1.65-V to 5.5-V VCCoperation.

This device is a dual two-input NAND buffer gate with open-drain outputs. It performs the Boolean function Y =A • Bor Y =A+Bin positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

Documents

Technical documentation and resources

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Little Logic Guide 2018 (Rev. G)

Selection guide

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Dual 2-Input NAND Gate With Open-Drain Outputs datasheet (Rev. D)

Data sheet

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

LVC Characterization Information

Application note

Signal Switch Data Book (Rev. A)

User guide

How to Select Little Logic (Rev. A)

Application note

Low-Voltage Logic (LVC) Designer's Guide

Design guide

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Understanding Advanced Bus-Interface Products Design Guide

Application note

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

Texas Instruments Little Logic Application Report

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

Live Insertion

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Logic Guide (Rev. AB)

Selection guide

Design Summary for WCSP Little Logic (Rev. B)

Product overview

Selecting the Right Level Translation Solution (Rev. A)

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide