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TSSOP (PW)
Integrated Circuits (ICs)

SN74LV6T06PWREP

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Texas Instruments

ENHANCED-PRODUCT, SIX-BIT INVERTING OPEN-DRAIN FIXED-DIRECTION LEVEL TRANSLATOR

TSSOP (PW)
Integrated Circuits (ICs)

SN74LV6T06PWREP

Active
Texas Instruments

ENHANCED-PRODUCT, SIX-BIT INVERTING OPEN-DRAIN FIXED-DIRECTION LEVEL TRANSLATOR

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LV6T06PWREP
Current - Output High, Low8 mA
Current - Output High, Low-
Logic TypeBuffer, Non-Inverting
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements6
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Output TypeOpen Drain
Package / Case14-TSSOP
Package / Case [custom]0.173 "
Package / Case [custom]4.4 mm
Supplier Device Package14-TSSOP
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]1.6 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 6.02
10$ 5.41
25$ 5.11
100$ 4.43
250$ 4.20
500$ 3.77
1000$ 3.18
Digi-Reel® 1$ 6.02
10$ 5.41
25$ 5.11
100$ 4.43
250$ 4.20
500$ 3.77
1000$ 3.18
Tape & Reel (TR) 3000$ 3.02
Texas InstrumentsLARGE T&R 1$ 4.14
100$ 3.38
250$ 2.65
1000$ 2.25

Description

General part information

SN74LV6T06-EP Series

The SN74LV6T06-EP device contains six independent inverters with open-drain outputs and extended voltage operation to allow for level translation. Each inverter performs the Boolean function Y = A in positive logic. The output level is referenced to the supply voltage (VCC) and supports 1.2V, 1.8V, 2.5V, 3.3V, and 5V CMOS levels.

The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2V input to 1.8V output or 1.8V input to 3.3V output). In addition, the 5V tolerant input pins enable down translation (for example, 3.3V to 2.5V output).

The SN74LV6T06-EP device contains six independent inverters with open-drain outputs and extended voltage operation to allow for level translation. Each inverter performs the Boolean function Y = A in positive logic. The output level is referenced to the supply voltage (VCC) and supports 1.2V, 1.8V, 2.5V, 3.3V, and 5V CMOS levels.