
SN74LV8151PWR
ActiveUNIVERSAL SCHMITT TRIGGER BUFFER 10-CH INVERTING/NON-INVERTING 3-ST CMOS 24-PIN TSSOP T/R
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SN74LV8151PWR
ActiveUNIVERSAL SCHMITT TRIGGER BUFFER 10-CH INVERTING/NON-INVERTING 3-ST CMOS 24-PIN TSSOP T/R
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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LV8151PWR |
|---|---|
| Current - Output High, Low [custom] | 12 mA |
| Current - Output High, Low [custom] | 12 mA |
| Logic Type | Buffer/Inverter |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Number of Inputs | 10 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Single-Ended |
| Package / Case | 24-TSSOP |
| Package / Case | 0.173 in, 4.4 mm |
| Schmitt Trigger Input | False |
| Supplier Device Package | 24-TSSOP |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Arrow | N/A | 1 | $ 0.96 | |
| 10 | $ 0.62 | |||
| 50 | $ 0.56 | |||
| 100 | $ 0.51 | |||
| 200 | $ 0.49 | |||
| Digikey | Cut Tape (CT) | 1 | $ 1.74 | |
| 10 | $ 1.11 | |||
| 25 | $ 0.94 | |||
| 100 | $ 0.75 | |||
| 250 | $ 0.66 | |||
| 500 | $ 0.60 | |||
| 1000 | $ 0.55 | |||
| Digi-Reel® | 1 | $ 1.74 | ||
| 10 | $ 1.11 | |||
| 25 | $ 0.94 | |||
| 100 | $ 0.75 | |||
| 250 | $ 0.66 | |||
| 500 | $ 0.60 | |||
| 1000 | $ 0.55 | |||
| Tape & Reel (TR) | 2000 | $ 0.51 | ||
| 4000 | $ 0.48 | |||
| 6000 | $ 0.46 | |||
| 10000 | $ 0.44 | |||
| 14000 | $ 0.43 | |||
| 20000 | $ 0.42 | |||
| Texas Instruments | LARGE T&R | 1 | $ 0.94 | |
| 100 | $ 0.72 | |||
| 250 | $ 0.53 | |||
| 1000 | $ 0.38 | |||
Description
General part information
SN74LV8151 Series
The SN74LV8151 is a 10-bit universal Schmitt-trigger buffer with 3-state outputs, designed for 2-V to 5.5-V VCCoperation. The logic control (T/C\) pin allows the user to configure Y1 to Y8 as noninverting or inverting outputs. When T/C\ is high, the Y outputs are noninverted (true logic ), and when T/C\ is low, the Y outputs are inverted (complementary logic).
When output-enable (OE)\ input is low, the device passes data from Dn to Yn. When OE\ is high, the Y outputs are in the high-impedance state. The path A to P is a simple Schmitt-trigger buffer, and the path B to N is a simple Schmitt-trigger inverter.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Documents
Technical documentation and resources