
ADN4668ARUZ
Active3 V LVDS QUAD CMOS DIFFERENTIAL LINE RECEIVER
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ADN4668ARUZ
Active3 V LVDS QUAD CMOS DIFFERENTIAL LINE RECEIVER
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Technical Specifications
Parameters and characteristics for this part
| Specification | ADN4668ARUZ |
|---|---|
| Data Rate | 400 Mbps |
| Mounting Type | Surface Mount |
| Number of Drivers/Receivers [custom] | 0 |
| Number of Drivers/Receivers [custom] | 4 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 16-TSSOP |
| Package / Case [x] | 0.173 in |
| Package / Case [y] | 4.4 mm |
| Protocol | LVDS |
| Supplier Device Package | 16-TSSOP |
| Type | Receiver |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 1 | $ 4.89 | |
| 10 | $ 3.26 | |||
| 25 | $ 2.84 | |||
| 100 | $ 2.36 | |||
| 250 | $ 2.13 | |||
| 500 | $ 1.99 | |||
| 1000 | $ 1.87 | |||
| 2500 | $ 1.74 | |||
| 5000 | $ 1.68 | |||
Description
General part information
ADN4668 Series
The ADN4668 is a quad-channel CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow-through pin configuration for easy PCB layout and separation of input and output signals. The device accepts low voltage (310 mV typical) differential input signals and converts them to a single-ended, 3 V TTL/CMOS logic level.The ADN4668 also offers active-high and active-low enable/disable inputs (EN and overbar:EN) that control all four receivers. They disable the receivers and switch the outputs to a high impedance state. This high impedance state allows the outputs of one or more ADN4668s to be multiplexed together and reduces the quies-cent power consumption to 3 mW typical. The ADN4668 and its companion driver, the ADN4667, offer a new solution to high speed, point-to-point data transmission and a low power alternative to emitter-coupled logic (ECL) or positive emitter-coupled logic (PECL).
Documents
Technical documentation and resources