SN74HCS72QDRQ1
ActiveAUTOMOTIVE SCHMITT-TRIGGER INPUT DUAL D-TYPE NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS W/ CLEAR AND PRESET
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SN74HCS72QDRQ1
ActiveAUTOMOTIVE SCHMITT-TRIGGER INPUT DUAL D-TYPE NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS W/ CLEAR AND PRESET
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74HCS72QDRQ1 |
|---|---|
| Clock Frequency | 74 MHz |
| Current - Output High, Low [custom] | 7.8 mA |
| Current - Output High, Low [custom] | 7.8 mA |
| Current - Quiescent (Iq) | 2 µA |
| Function | Reset, Set(Preset) |
| Grade | Automotive |
| Input Capacitance | 5 pF |
| Max Propagation Delay @ V, Max CL | 15 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 1 |
| Number of Elements | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Complementary |
| Package / Case | 14-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Qualification | AEC-Q100 |
| Trigger Type | Negative Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.61 | |
| 10 | $ 0.53 | |||
| 25 | $ 0.49 | |||
| 100 | $ 0.39 | |||
| 250 | $ 0.36 | |||
| 500 | $ 0.31 | |||
| 1000 | $ 0.24 | |||
| Digi-Reel® | 1 | $ 0.61 | ||
| 10 | $ 0.53 | |||
| 25 | $ 0.49 | |||
| 100 | $ 0.39 | |||
| 250 | $ 0.36 | |||
| 500 | $ 0.31 | |||
| 1000 | $ 0.24 | |||
| Tape & Reel (TR) | 2500 | $ 0.17 | ||
| Texas Instruments | LARGE T&R | 1 | $ 0.40 | |
| 100 | $ 0.27 | |||
| 250 | $ 0.21 | |||
| 1000 | $ 0.14 | |||
Description
General part information
SN74HCS72-Q1 Series
This device contains two independent D-type negative-edge-triggered flip-flops. All inputs include Schmitt-triggers, allowing for slow or noisy input signals. A low level at the preset (PRE) input sets the output high. A low level at the clear (CLR) input resets the output low. Preset and clear functions are asynchronous and not dependent on the levels of the other inputs. WhenPREandCLRare inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs (Q,Q) on the negative-going edge of the clock (CLK) pulse. Following the hold-time interval, data at the data (D) input can be changed without affecting the levels at the outputs (Q,Q).
This device contains two independent D-type negative-edge-triggered flip-flops. All inputs include Schmitt-triggers, allowing for slow or noisy input signals. A low level at the preset (PRE) input sets the output high. A low level at the clear (CLR) input resets the output low. Preset and clear functions are asynchronous and not dependent on the levels of the other inputs. WhenPREandCLRare inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs (Q,Q) on the negative-going edge of the clock (CLK) pulse. Following the hold-time interval, data at the data (D) input can be changed without affecting the levels at the outputs (Q,Q).