SN74ABT16601DL
Active18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
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SN74ABT16601DL
Active18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ABT16601DL |
|---|---|
| Current - Output High, Low [custom] | 64 mA |
| Current - Output High, Low [custom] | 32 mA |
| Mounting Type | Surface Mount |
| Number of Circuits | 18 Bit |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 0.295 in |
| Package / Case | 56-BSSOP |
| Package / Case | 7.5 mm |
| Supplier Device Package | 56-SSOP |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 140 | $ 7.32 | |
| Texas Instruments | TUBE | 1 | $ 7.49 | |
| 100 | $ 6.11 | |||
| 250 | $ 4.80 | |||
| 1000 | $ 4.07 | |||
Description
General part information
SN74ABT16601 Series
These 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, clocked, and clock-enabled modes.
Data flow in each direction is controlled by output-enable (and), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (and) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. Output enableis active low. Whenis low, the outputs are active. Whenis high, the outputs are in the high-impedance state.
Data flow for B to A is similar to that of A to B, but uses, LEBA, CLKBA, and.
Documents
Technical documentation and resources
