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TSSOP (DGG)
Integrated Circuits (ICs)

SN74ABT16601DGGR

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Texas Instruments

18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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TSSOP (DGG)
Integrated Circuits (ICs)

SN74ABT16601DGGR

Active
Texas Instruments

18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74ABT16601DGGR
Current - Output High, Low [custom]64 mA
Current - Output High, Low [custom]32 mA
Mounting TypeSurface Mount
Number of Circuits18 Bit
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case6.1 mm
Package / Case0.24 in
Package / Case56-TFSOP
Supplier Device Package56-TSSOP
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 7.53
Digi-Reel® 1$ 7.53
Tape & Reel (TR) 2000$ 4.11
Texas InstrumentsLARGE T&R 1$ 5.76
100$ 4.70
250$ 3.69
1000$ 3.13

Description

General part information

SN74ABT16601 Series

These 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, clocked, and clock-enabled modes.

Data flow in each direction is controlled by output-enable (and), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (and) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. Output enableis active low. Whenis low, the outputs are active. Whenis high, the outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B, but uses, LEBA, CLKBA, and.