Zenode.ai Logo
Beta
28-pin (FK) package image
Integrated Circuits (ICs)

CY54FCT480BTLMB

Active
Texas Instruments

DUAL 8-BIT PARITY GENERATOR/CHECKER

Deep-Dive with AI

Search across all available documentation for this part.

28-pin (FK) package image
Integrated Circuits (ICs)

CY54FCT480BTLMB

Active
Texas Instruments

DUAL 8-BIT PARITY GENERATOR/CHECKER

Technical Specifications

Parameters and characteristics for this part

SpecificationCY54FCT480BTLMB
Current - Output High, Low [custom]12 mA
Current - Output High, Low [custom]32 mA
Logic TypeParity Generator/Checker
Mounting TypeSurface Mount
Number of Circuits [custom]8
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Package / Case28-CLCC
Supplier Device Package28-LCCC
Supplier Device Package [x]11.43
Supplier Device Package [y]11.43
Voltage - Supply [Max]5.25 V
Voltage - Supply [Min]4.75 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
Texas InstrumentsTUBE 1$ 161.38
10$ 147.93
100$ 134.48

Description

General part information

CY54FCT480T Series

The \x92FCT480T devices are high-speed, dual, 8-bit parity generators/checkers. Each parity generator/checker accepts eight data bits and one parity bit as inputs, and generates a sum and parity-error (ERROR\) output. These devices can be used in odd-parity systems. ERROR\ is an open-drain output designed for easy expansion of the word width by a wired-OR connection of several \x92FCT480T devices. Because no additional logic is needed, the parity-generation or parity-checking times remain the same as for an individual \x92FCT480T device.

These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The \x92FCT480T devices are high-speed, dual, 8-bit parity generators/checkers. Each parity generator/checker accepts eight data bits and one parity bit as inputs, and generates a sum and parity-error (ERROR\) output. These devices can be used in odd-parity systems. ERROR\ is an open-drain output designed for easy expansion of the word width by a wired-OR connection of several \x92FCT480T devices. Because no additional logic is needed, the parity-generation or parity-checking times remain the same as for an individual \x92FCT480T device.