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8-DFN Exposed Pad
Integrated Circuits (ICs)

SN65LVDS20DRFTG4

Unknown
Texas Instruments

IC LVPECL/LVDS REPEAT/XLATR 8SON

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8-DFN Exposed Pad
Integrated Circuits (ICs)

SN65LVDS20DRFTG4

Unknown
Texas Instruments

IC LVPECL/LVDS REPEAT/XLATR 8SON

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationSN65LVDS20DRFTG4
ApplicationsLVDS
Current - Supply35 mA
Data Rate (Max)4 Gbps
Delay Time30 ns
InputDifferential
Mounting TypeSurface Mount
Number of Channels1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputLVDS
Package / Case8-WFDFN Exposed Pad
Supplier Device Package8-WSON (2x2)
TypeReDriver, Buffer
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2.375 V

SN65LVDS20 Series

4-Gbps PECL to LVDS translator

PartSupplier Device PackageTypeOperating Temperature [Max]Operating Temperature [Min]ApplicationsCurrent - SupplyMounting TypeNumber of ChannelsOutputDelay TimePackage / CaseVoltage - Supply [Max]Voltage - Supply [Min]InputData Rate (Max)FunctionSupplied ContentsUtilized IC / PartContents
8-DFN Exposed Pad
Texas Instruments
8-WSON (2x2)
Buffer
ReDriver
85 °C
-40 °C
LVDS
35 mA
Surface Mount
1
LVDS
30 ns
8-WFDFN Exposed Pad
3.6 V
2.375 V
Differential
4 Gbps
8-DFN Exposed Pad
Texas Instruments
8-WSON (2x2)
Buffer
ReDriver
85 °C
-40 °C
LVDS
35 mA
Surface Mount
1
LVDS
30 ns
8-WFDFN Exposed Pad
3.6 V
2.375 V
Differential
4 Gbps
8-DFN Exposed Pad
Texas Instruments
8-WSON (2x2)
Buffer
ReDriver
85 °C
-40 °C
LVDS
35 mA
Surface Mount
1
LVDS
30 ns
8-WFDFN Exposed Pad
3.6 V
2.375 V
Differential
4 Gbps
SN65LVDS20EVM
Texas Instruments
Interface
Buffer/Repeater
LVDS
Board(s)
SN65LVDS20
Board(s)

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTape & Reel (TR) 250$ 4.37
500$ 3.92
1250$ 3.31
2500$ 3.14

Description

General part information

SN65LVDS20 Series

The SN65LVDS20 and SN65LVP20 are a high-speed differential receiver and driver connected as a repeater. The receiver accepts low-voltage positive-emitter-coupled logic (PECL) at signaling rates up to 4 Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the device is differential for low radiated emissions and minimal added jitter.

The outputs of the SN65LVDS20 are LVDS levels as defined by TIA/EIA-644-A. The outputs of the SN65LVDP20 are compatible with low-voltage PECL levels. A low-level input toENenables the outputs. A high-level input puts the output into a high-impedance state. Both outputs are designed to drive differential transmission lines with nominally 100-characteristic impedance.

Both devices provide a voltage reference (VBB) of typically 1.35 V below VCCfor use in receiving single-ended PECL input signals. When not used, VBBshould be unconnected or open.

Documents

Technical documentation and resources

No documents available