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Technical Specifications
Parameters and characteristics for this part
| Specification | SN65LVDS20EVM |
|---|---|
| Contents | Board(s) |
| Function | Buffer/Repeater, LVDS |
| Supplied Contents | Board(s) |
| Type | Interface |
| Utilized IC / Part | SN65LVDS20 |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Box | 1 | $ 58.80 | |
Description
General part information
SN65LVDS20 Series
The SN65LVDS20 and SN65LVP20 are a high-speed differential receiver and driver connected as a repeater. The receiver accepts low-voltage positive-emitter-coupled logic (PECL) at signaling rates up to 4 Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the device is differential for low radiated emissions and minimal added jitter.
The outputs of the SN65LVDS20 are LVDS levels as defined by TIA/EIA-644-A. The outputs of the SN65LVDP20 are compatible with low-voltage PECL levels. A low-level input toENenables the outputs. A high-level input puts the output into a high-impedance state. Both outputs are designed to drive differential transmission lines with nominally 100-characteristic impedance.
Both devices provide a voltage reference (VBB) of typically 1.35 V below VCCfor use in receiving single-ended PECL input signals. When not used, VBBshould be unconnected or open.
Documents
Technical documentation and resources
