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MC74HC132ADTR2G
Integrated Circuits (ICs)

MC74AC74DTR2G

Active
ON Semiconductor

FLIP FLOP, 74AC74, D, 10 NS, 160 MHZ, 24 MA, 14 PINS, WTSSOP

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MC74HC132ADTR2G
Integrated Circuits (ICs)

MC74AC74DTR2G

Active
ON Semiconductor

FLIP FLOP, 74AC74, D, 10 NS, 160 MHZ, 24 MA, 14 PINS, WTSSOP

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationMC74AC74DTR2G
Clock Frequency160 MHz
Current - Output High, Low24 mA
Current - Quiescent (Iq)4 çA
FunctionReset, Set(Preset)
Input Capacitance4.5 pF
Max Propagation Delay @ V, Max CL10 ns
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeComplementary
Package / Case14-TSSOP
Package / Case [custom]0.173 "
Package / Case [custom]4.4 mm
Supplier Device Package14-TSSOP
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]6 V
Voltage - Supply [Min]2 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 1.06
10$ 0.63
25$ 0.52
100$ 0.40
250$ 0.35
500$ 0.31
1000$ 0.29
Digi-Reel® 1$ 1.06
10$ 0.63
25$ 0.52
100$ 0.40
250$ 0.35
500$ 0.31
1000$ 0.29
Tape & Reel (TR) 2500$ 0.20
NewarkEach (Supplied on Full Reel) 1$ 0.18
3000$ 0.18
6000$ 0.16
12000$ 0.15
18000$ 0.14
30000$ 0.14
ON SemiconductorN/A 1$ 0.14

Description

General part information

MC74AC74 Series

The MC74AC74/74ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input. Asynchronous Inputs:LOW input to SD(Set) sets Q to HIGH level LOW input to CD(Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CDand SDmakes both Q and Q HIGH