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TEXTISTLC2274QPWRQ1
Integrated Circuits (ICs)

74LVX74M

Active
ON Semiconductor

LOW VOLTAGE DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP

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TEXTISTLC2274QPWRQ1
Integrated Circuits (ICs)

74LVX74M

Active
ON Semiconductor

LOW VOLTAGE DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP

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Technical Specifications

Parameters and characteristics for this part

Specification74LVX74M
Clock Frequency85 MHz
Current - Output High, Low [custom]4 mA
Current - Output High, Low [custom]4 mA
Current - Quiescent (Iq)2 µA
FunctionReset, Set(Preset)
Input Capacitance4 pF
Max Propagation Delay @ V, Max CL13.2 ns
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeComplementary
Package / Case14-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2 V

MC74LVX74 Series

Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop

PartMax Propagation Delay @ V, Max CLClock FrequencyPackage / Case [x]Package / Case [y]Package / CaseTrigger TypeCurrent - Quiescent (Iq)Current - Output High, Low [custom]Current - Output High, Low [custom]FunctionInput CapacitanceNumber of ElementsMounting TypeVoltage - Supply [Max]Voltage - Supply [Min]Operating Temperature [Max]Operating Temperature [Min]Output TypeTypeNumber of Bits per ElementPackage / Case [custom]Package / Case [custom]Supplier Device Package
14 SOIC
ON Semiconductor
13.2 ns
85 MHz
0.154 in
3.9 mm
14-SOIC
Positive Edge
2 µA
4 mA
4 mA
Reset
Set(Preset)
4 pF
2
Surface Mount
3.6 V
2 V
85 °C
-40 °C
Complementary
D-Type
1
14-SOIC
ON Semiconductor
13.2 ns
85 MHz
0.154 in
3.9 mm
14-SOIC
Positive Edge
2 µA
4 mA
4 mA
Reset
Set(Preset)
4 pF
2
Surface Mount
3.6 V
2 V
85 °C
-40 °C
Complementary
D-Type
1
MC74HC132ADTR2G
ON Semiconductor
13.2 ns
85 MHz
14-TSSOP
Positive Edge
2 µA
4 mA
4 mA
Reset
Set(Preset)
4 pF
2
Surface Mount
3.6 V
2 V
85 °C
-40 °C
Complementary
D-Type
1
0.173 "
4.4 mm
14-TSSOP
TEXTISTLC2274QPWRQ1
ON Semiconductor
13.2 ns
85 MHz
0.154 in
3.9 mm
14-SOIC
Positive Edge
2 µA
4 mA
4 mA
Reset
Set(Preset)
4 pF
2
Surface Mount
3.6 V
2 V
85 °C
-40 °C
Complementary
D-Type
1
TEXTISTLC2274QPWRQ1
ON Semiconductor
13.2 ns
85 MHz
0.154 in
3.9 mm
14-SOIC
Positive Edge
2 µA
4 mA
4 mA
Reset
Set(Preset)
4 pF
2
Surface Mount
3.6 V
2 V
85 °C
-40 °C
Complementary
D-Type
1
14 SOIC
ON Semiconductor
13.2 ns
85 MHz
0.209 "
5.3 mm
14-SOIC
Positive Edge
2 µA
4 mA
4 mA
Reset
Set(Preset)
4 pF
2
Surface Mount
3.6 V
2 V
85 °C
-40 °C
Complementary
D-Type
1
SOEIAJ-14
TEXTISTLC2274QPWRQ1
ON Semiconductor
13.2 ns
85 MHz
14-TSSOP
Positive Edge
2 µA
4 mA
4 mA
Reset
Set(Preset)
4 pF
2
Surface Mount
3.6 V
2 V
85 °C
-40 °C
Complementary
D-Type
1
0.173 "
4.4 mm
14-TSSOP
14-SOP
ON Semiconductor
13.2 ns
85 MHz
0.209 "
5.3 mm
14-SOIC
Positive Edge
2 µA
4 mA
4 mA
Reset
Set(Preset)
4 pF
2
Surface Mount
3.6 V
2 V
85 °C
-40 °C
Complementary
D-Type
1
14-SOP
14 TSSOP
ON Semiconductor
13.2 ns
85 MHz
14-TSSOP
Positive Edge
2 µA
4 mA
4 mA
Reset
Set(Preset)
4 pF
2
Surface Mount
3.6 V
2 V
85 °C
-40 °C
Complementary
D-Type
1
0.173 "
4.4 mm
14-TSSOP
MICROCHIP MCP6V74-E/ST
ON Semiconductor
13.2 ns
85 MHz
14-TSSOP
Positive Edge
2 µA
4 mA
4 mA
Reset
Set(Preset)
4 pF
2
Surface Mount
3.6 V
2 V
85 °C
-40 °C
Complementary
D-Type
1
0.173 "
4.4 mm
14-TSSOP

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyBulk 849$ 0.35

Description

General part information

MC74LVX74 Series

The LVX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q#) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input. Asynchronous Inputs: LOW input to S#D(Set) sets Q to HIGH level LOW input to C#D(Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on C#Dand S#Dmakes both Q and Q# HIGH

Documents

Technical documentation and resources