Specification	MC74LVX74DTR2G

Clock Frequency	85 MHz
Current - Output High, Low [custom]	4 mA
Current - Output High, Low [custom]	4 mA
Current - Quiescent (Iq)	2 µA
Function	Reset, Set(Preset)
Input Capacitance	4 pF
Max Propagation Delay @ V, Max CL	13.2 ns
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	2
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Complementary
Package / Case	14-TSSOP
Package / Case [custom]	0.173 "
Package / Case [custom]	4.4 mm
Supplier Device Package	14-TSSOP
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	2 V

MC74LVX74 Series

Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop

Part	Max Propagation Delay @ V, Max CL	Clock Frequency	Package / Case [x]	Package / Case [y]	Package / Case	Trigger Type	Current - Quiescent (Iq)	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Function	Input Capacitance	Number of Elements	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Operating Temperature [Max]	Operating Temperature [Min]	Output Type	Type	Number of Bits per Element	Package / Case [custom]	Package / Case [custom]	Supplier Device Package
ON Semiconductor MC74LVX74DR2	13.2 ns	85 MHz	0.154 in	3.9 mm	14-SOIC	Positive Edge	2 µA	4 mA	4 mA	Reset Set(Preset)	4 pF	2	Surface Mount	3.6 V	2 V	85 °C	-40 °C	Complementary	D-Type	1
ON Semiconductor 74LVX74MX	13.2 ns	85 MHz	0.154 in	3.9 mm	14-SOIC	Positive Edge	2 µA	4 mA	4 mA	Reset Set(Preset)	4 pF	2	Surface Mount	3.6 V	2 V	85 °C	-40 °C	Complementary	D-Type	1
ON Semiconductor MC74LVX74DTR2G	13.2 ns	85 MHz			14-TSSOP	Positive Edge	2 µA	4 mA	4 mA	Reset Set(Preset)	4 pF	2	Surface Mount	3.6 V	2 V	85 °C	-40 °C	Complementary	D-Type	1	0.173 "	4.4 mm	14-TSSOP
ON Semiconductor MC74LVX74D	13.2 ns	85 MHz	0.154 in	3.9 mm	14-SOIC	Positive Edge	2 µA	4 mA	4 mA	Reset Set(Preset)	4 pF	2	Surface Mount	3.6 V	2 V	85 °C	-40 °C	Complementary	D-Type	1
ON Semiconductor 74LVX74M	13.2 ns	85 MHz	0.154 in	3.9 mm	14-SOIC	Positive Edge	2 µA	4 mA	4 mA	Reset Set(Preset)	4 pF	2	Surface Mount	3.6 V	2 V	85 °C	-40 °C	Complementary	D-Type	1
ON Semiconductor MC74LVX74MG	13.2 ns	85 MHz	0.209 "	5.3 mm	14-SOIC	Positive Edge	2 µA	4 mA	4 mA	Reset Set(Preset)	4 pF	2	Surface Mount	3.6 V	2 V	85 °C	-40 °C	Complementary	D-Type	1			SOEIAJ-14
ON Semiconductor MC74LVX74DTR	13.2 ns	85 MHz			14-TSSOP	Positive Edge	2 µA	4 mA	4 mA	Reset Set(Preset)	4 pF	2	Surface Mount	3.6 V	2 V	85 °C	-40 °C	Complementary	D-Type	1	0.173 "	4.4 mm	14-TSSOP
ON Semiconductor 74LVX74SJ	13.2 ns	85 MHz	0.209 "	5.3 mm	14-SOIC	Positive Edge	2 µA	4 mA	4 mA	Reset Set(Preset)	4 pF	2	Surface Mount	3.6 V	2 V	85 °C	-40 °C	Complementary	D-Type	1			14-SOP
ON Semiconductor 74LVX74MTC	13.2 ns	85 MHz			14-TSSOP	Positive Edge	2 µA	4 mA	4 mA	Reset Set(Preset)	4 pF	2	Surface Mount	3.6 V	2 V	85 °C	-40 °C	Complementary	D-Type	1	0.173 "	4.4 mm	14-TSSOP
ON Semiconductor 74LVX74MTCX	13.2 ns	85 MHz			14-TSSOP	Positive Edge	2 µA	4 mA	4 mA	Reset Set(Preset)	4 pF	2	Surface Mount	3.6 V	2 V	85 °C	-40 °C	Complementary	D-Type	1	0.173 "	4.4 mm	14-TSSOP

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.63
	Digi-Reel®	1	$ 0.63
	Tape & Reel (TR)	2500	$ 0.23
		5000	$ 0.22
		12500	$ 0.21
		25000	$ 0.21
Newark	Each (Supplied on Full Reel)	1	$ 0.16
		3000	$ 0.16
		6000	$ 0.14
		12000	$ 0.14
		18000	$ 0.13
		30000	$ 0.12
ON Semiconductor	N/A	1	$ 0.12

Description

General part information

MC74LVX74 Series

The LVX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q#) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input. Asynchronous Inputs: LOW input to S#D(Set) sets Q to HIGH level LOW input to C#D(Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on C#Dand S#Dmakes both Q and Q# HIGH