DS90C031TMX/NOPB
ActiveLVDS QUAD CMOS DIFFERENTIAL LINE DRIVER
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DS90C031TMX/NOPB
ActiveLVDS QUAD CMOS DIFFERENTIAL LINE DRIVER
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Technical Specifications
Parameters and characteristics for this part
| Specification | DS90C031TMX/NOPB |
|---|---|
| Mounting Type | Surface Mount |
| Number of Drivers/Receivers [custom] | 4 |
| Number of Drivers/Receivers [custom] | 0 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 16-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Protocol | LVDS |
| Supplier Device Package | 16-SOIC |
| Type | Driver |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 2.37 | |
| 10 | $ 2.13 | |||
| 25 | $ 2.01 | |||
| 100 | $ 1.74 | |||
| 250 | $ 1.65 | |||
| 500 | $ 1.57 | |||
| Digi-Reel® | 1 | $ 2.37 | ||
| 10 | $ 2.13 | |||
| 25 | $ 2.01 | |||
| 100 | $ 1.74 | |||
| 250 | $ 1.65 | |||
| 500 | $ 1.57 | |||
| Tape & Reel (TR) | 2500 | $ 1.57 | ||
| Texas Instruments | LARGE T&R | 1 | $ 2.24 | |
| 100 | $ 1.96 | |||
| 250 | $ 1.38 | |||
| 1000 | $ 1.11 | |||
Description
General part information
DS90C031B Series
The DS90C031B is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device supports data rates in excess of 155.5 Mbps (77.7 MHz) and uses Low Voltage Differential Signaling (LVDS) technology.
The DS90C031B accepts TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 11 mW typical.
In addition, the DS90C031B provides power-off high impedance LVDS outputs. This feature assures minimal loading effect on the LVDS bus lines when VCCis not present.
Documents
Technical documentation and resources
