Catalog
LVDS quad CMOS differential line driver
Key Features
• >155.5 Mbps (77.7 MHz) switching ratesHigh impedance LVDS outputs with power-off±350 mV differential signalingUltra low power dissipation400 ps maximum differential skew (5V, 25°C)3.5 ns maximum propagation delayIndustrial operating temperature rangePin compatible with DS26C31, MB571 (PECL) and 41LG (PECL)Conforms to ANSI/TIA/EIA-644 LVDS standardOffered in narrow body SOIC packageFail-safe logic for floating inputsAll trademarks are the property of their respective owners.>155.5 Mbps (77.7 MHz) switching ratesHigh impedance LVDS outputs with power-off±350 mV differential signalingUltra low power dissipation400 ps maximum differential skew (5V, 25°C)3.5 ns maximum propagation delayIndustrial operating temperature rangePin compatible with DS26C31, MB571 (PECL) and 41LG (PECL)Conforms to ANSI/TIA/EIA-644 LVDS standardOffered in narrow body SOIC packageFail-safe logic for floating inputsAll trademarks are the property of their respective owners.
Description
AI
The DS90C031B is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device supports data rates in excess of 155.5 Mbps (77.7 MHz) and uses Low Voltage Differential Signaling (LVDS) technology.
The DS90C031B accepts TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 11 mW typical.
In addition, the DS90C031B provides power-off high impedance LVDS outputs. This feature assures minimal loading effect on the LVDS bus lines when VCCis not present.
The DS90C031B and companion line receiver (DS90C032B) provide a new alternative to high power pseudo‐ECL devices for high speed point-to-point interface applications.
The DS90C031B is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device supports data rates in excess of 155.5 Mbps (77.7 MHz) and uses Low Voltage Differential Signaling (LVDS) technology.
The DS90C031B accepts TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 11 mW typical.
In addition, the DS90C031B provides power-off high impedance LVDS outputs. This feature assures minimal loading effect on the LVDS bus lines when VCCis not present.
The DS90C031B and companion line receiver (DS90C032B) provide a new alternative to high power pseudo‐ECL devices for high speed point-to-point interface applications.
