Zenode.ai Logo
Beta
8-pin (DCT) package image
Integrated Circuits (ICs)

SN74LVC1G29DCTR

Active
Texas Instruments

2-OF-3 DECODER/DEMULTIPLEXER

Deep-Dive with AI

Search across all available documentation for this part.

8-pin (DCT) package image
Integrated Circuits (ICs)

SN74LVC1G29DCTR

Active
Texas Instruments

2-OF-3 DECODER/DEMULTIPLEXER

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC1G29DCTR
Circuit1 x 2:3
Current - Output High, Low [x]32 mA
Current - Output High, Low [y]32 mA
Independent Circuits1
Mounting TypeSurface Mount
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Supplier Device PackageSM8
TypeDecoder/Demultiplexer
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]1.65 V
Voltage Supply SourceSingle Supply

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.58
10$ 0.49
25$ 0.46
100$ 0.37
250$ 0.34
500$ 0.29
1000$ 0.22
Digi-Reel® 1$ 0.58
10$ 0.49
25$ 0.46
100$ 0.37
250$ 0.34
500$ 0.29
1000$ 0.22
Tape & Reel (TR) 3000$ 0.20
6000$ 0.19
15000$ 0.18
30000$ 0.17
Texas InstrumentsLARGE T&R 1$ 0.27
100$ 0.18
250$ 0.14
1000$ 0.10

Description

General part information

SN74LVC1G29 Series

This decoder is designed for 1.65-V to 5.5-V VCCoperation.

The SN74LVC1G29 device is a 2-of-3 decoder/demultiplexer. When the enable (G) input signal is low, only one of the outputs is in the low state, depending on the input levels of A0 and A1. WhenGis high, Y0, Y1, and Y2 are high, regardless of the input states.

This device is fuly specified for partial-power-down applications using Ioff. The Ioffcircuitry disable the outputs, preventing damaging current backflow through the device when it is powered down.

Documents

Technical documentation and resources

Live Insertion

Application note

Texas Instruments Little Logic Application Report

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

Selecting the Right Level Translation Solution (Rev. A)

Application note

Low-Voltage Logic (LVC) Designer's Guide

Design guide

2-of-3 Decoder/Demultiplexer datasheet (Rev. C)

Data sheet

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Little Logic Guide 2018 (Rev. G)

Selection guide

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Signal Switch Data Book (Rev. A)

User guide

Design Summary for WCSP Little Logic (Rev. B)

Product overview

Logic Guide (Rev. AB)

Selection guide

Understanding Advanced Bus-Interface Products Design Guide

Application note

How to Select Little Logic (Rev. A)

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

LVC Characterization Information

Application note

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note