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Texas Instruments-TSB41AB2IPAP Transceivers Misc Two Port Cable Transceiver/Arbiter 1TX 1RX 400Mbps 64-Pin HTQFP EP Tray
Integrated Circuits (ICs)

SN65DSI83TPAPRQ1

Active
Texas Instruments

LVDS RECEIVER 1000MBPS 64-PIN HTQFP EP T/R AUTOMOTIVE AEC-Q100

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Texas Instruments-TSB41AB2IPAP Transceivers Misc Two Port Cable Transceiver/Arbiter 1TX 1RX 400Mbps 64-Pin HTQFP EP Tray
Integrated Circuits (ICs)

SN65DSI83TPAPRQ1

Active
Texas Instruments

LVDS RECEIVER 1000MBPS 64-PIN HTQFP EP T/R AUTOMOTIVE AEC-Q100

Technical Specifications

Parameters and characteristics for this part

SpecificationSN65DSI83TPAPRQ1
GradeAutomotive
InterfaceSerial
Mounting TypeSurface Mount
Package / Case64-PowerTQFP
QualificationAEC-Q100
Supplier Device Package64-HTQFP (10x10)
Voltage - Supply [Max]1.95 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
ArrowN/A 1000$ 4.38
DigikeyCut Tape (CT) 1$ 8.19
10$ 6.35
25$ 5.89
100$ 5.38
250$ 5.14
500$ 5.00
Digi-Reel® 1$ 8.19
10$ 6.35
25$ 5.89
100$ 5.38
250$ 5.14
500$ 5.00
Tape & Reel (TR) 1000$ 4.88
2000$ 4.78
Texas InstrumentsLARGE T&R 1$ 6.51
100$ 5.31
250$ 4.17
1000$ 3.54

Description

General part information

SN65DSI83-Q1 Series

The SN65DSI83-Q1 DSI-to-LVDS bridge features a single-channel MIPI D-PHY receiver front-endconfiguration with four lanes per channel operating at 1 Gbps per lane and a maximum input bandwidth of 4 Gbps. The bridge decodes MIPI DSI 18-bpp RGB666 and 24-bpp RGB888 packets and converts the formatted video data-stream to an LVDS output operating at pixel clocks operating from 25 MHz to 154 MHz, offering a Single-Link LVDS with four data lanes per link.

The SN65DSI83-Q1 device can support up to WUXGA 1920 × 1200 at 60 frames per second, at 24 bpp with reduced blanking. The SN65DSI83-Q1 device is also suitable for applications using 60 fps 1366 × 768/1280 × 800 at 18 bpp and 24 bpp. Partial line buffering is implemented to accommodate the data stream mismatch between the DSI and LVDS interfaces.

The SN65DSI83-Q1 device is implemented in a small outline 10-mm × 10-mm HTQFP package with a0.5-mm pitch, and operates across a temperature range from –40°C to +105°C.