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Technical Specifications
Parameters and characteristics for this part
| Specification | DS92LV040ATLQA |
|---|---|
| Data Rate | 155 Mbps |
| Duplex | Half |
| Mounting Type | Surface Mount |
| Number of Drivers/Receivers [custom] | 4 |
| Number of Drivers/Receivers [custom] | 4 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 44-WFQFN Exposed Pad |
| Protocol | LVDS |
| Supplier Device Package | 44-WQFN (7x7) |
| Type | Transceiver |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
DS92LV040A Series
The DS92LV040A is one in a series of Bus LVDS transceivers designed specifically for high speed, low power backplane or cable interfaces. The device operates from a single 3.3-V power supply and includes four differential line drivers and four receivers. To minimize bus loading, the driver outputs and receiver inputs are internally connected. The device also features a flow through pin out which allows easy PCB routing for short stubs between its pins and the connector.
The driver translates 3-V LVTTL levels (single-ended) to differential Bus LVDS (BLVDS) output levels. This allows for high speed operation while consuming minimal power and reducing EMI. In addition, the differential signaling provides common mode noise rejection greater than ±1 V.
The receiver threshold is less than +0/−70 mV. The receiver translates the differential Bus LVDS to standard (LVTTL/LVCMOS) levels. (See theApplication InformationSection for more details.)
Documents
Technical documentation and resources
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