Specification	SN74ALVC126DGVR

Current - Output High, Low	24 mA
Logic Type	Buffer, Non-Inverting
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	4
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	3-State
Package / Case	14-TFSOP
Package / Case [x]	4.4 mm, 0.173 in
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	1.65 V

SN74ALVC126 Series

4-ch, 1.65-V to 3.6-V buffers with 3-state outputs

Part	Number of Bits per Element	Voltage - Supply [Min]	Voltage - Supply [Max]	Logic Type	Output Type	Current - Output High, Low	Operating Temperature [Max]	Operating Temperature [Min]	Number of Elements	Package / Case	Package / Case [x]	Mounting Type	Package / Case [y]	Supplier Device Package	Package / Case [custom]	Package / Case [custom]
Texas Instruments SN74ALVC126DGVR	1	1.65 V	3.6 V	Buffer Non-Inverting	3-State	24 mA	85 °C	-40 °C	4	14-TFSOP	0.173 in 4.4 mm	Surface Mount
Texas Instruments SN74ALVC126NSR	1	1.65 V	3.6 V	Buffer Non-Inverting	3-State	24 mA	85 °C	-40 °C	4	14-SOIC	0.209 "	Surface Mount	5.3 mm	14-SO
Texas Instruments SN74ALVC126PWR	1	1.65 V	3.6 V	Buffer Non-Inverting	3-State	24 mA	85 °C	-40 °C	4	14-TSSOP		Surface Mount		14-TSSOP	0.173 "	4.4 mm
Texas Instruments SN74ALVC126DR	1	1.65 V	3.6 V	Buffer Non-Inverting	3-State	24 mA	85 °C	-40 °C	4	14-SOIC	0.154 in	Surface Mount	3.9 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.66
		10	$ 0.56
		25	$ 0.53
		100	$ 0.42
		250	$ 0.39
		500	$ 0.33
		1000	$ 0.26
	Digi-Reel®	1	$ 0.66
		10	$ 0.56
		25	$ 0.53
		100	$ 0.42
		250	$ 0.39
		500	$ 0.33
		1000	$ 0.26
	Tape & Reel (TR)	2000	$ 0.23
		6000	$ 0.22
		10000	$ 0.20
		50000	$ 0.19
Texas Instruments	LARGE T&R	1	$ 0.43
		100	$ 0.29
		250	$ 0.22
		1000	$ 0.15

Description

General part information

SN74ALVC126 Series

This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCCoperation.

The SN74ALVC126 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.