SN74ALVC126 Series

4-ch, 1.65-V to 3.6-V buffers with 3-state outputs

Catalog

4-ch, 1.65-V to 3.6-V buffers with 3-state outputs

Part	Number of Bits per Element	Voltage - Supply [Min]	Voltage - Supply [Max]	Logic Type	Output Type	Current - Output High, Low	Operating Temperature [Max]	Operating Temperature [Min]	Number of Elements	Package / Case	Package / Case [x]	Mounting Type	Package / Case [y]	Supplier Device Package	Package / Case [custom]	Package / Case [custom]
Texas Instruments SN74ALVC126DGVR	1	1.65 V	3.6 V	Buffer Non-Inverting	3-State	24 mA	85 °C	-40 °C	4	14-TFSOP	0.173 in 4.4 mm	Surface Mount
Texas Instruments SN74ALVC126NSR	1	1.65 V	3.6 V	Buffer Non-Inverting	3-State	24 mA	85 °C	-40 °C	4	14-SOIC	0.209 "	Surface Mount	5.3 mm	14-SO
Texas Instruments SN74ALVC126PWR	1	1.65 V	3.6 V	Buffer Non-Inverting	3-State	24 mA	85 °C	-40 °C	4	14-TSSOP		Surface Mount		14-TSSOP	0.173 "	4.4 mm
Texas Instruments SN74ALVC126DR	1	1.65 V	3.6 V	Buffer Non-Inverting	3-State	24 mA	85 °C	-40 °C	4	14-SOIC	0.154 in	Surface Mount	3.9 mm

Catalog

4-ch, 1.65-V to 3.6-V buffers with 3-state outputs

Key Features

• Operates From 1.65 V to 3.6 VMax tpdof 3.1 ns at 3.3 V±24-mA Output Drive at 3.3 VLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Operates From 1.65 V to 3.6 VMax tpdof 3.1 ns at 3.3 V±24-mA Output Drive at 3.3 VLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)

Description

This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCCoperation. The SN74ALVC126 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCCoperation. The SN74ALVC126 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.