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64 VQFN
Integrated Circuits (ICs)

LMK5B33414RGCT

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Texas Instruments

14-OUTPUT, THREE DPLL AND APLL, NETWORK SYNCHRONIZER WITH INTEGRATED 2.5-GHZ BULK-ACOUSTIC-WAVE VCO

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64 VQFN
Integrated Circuits (ICs)

LMK5B33414RGCT

Active
Texas Instruments

14-OUTPUT, THREE DPLL AND APLL, NETWORK SYNCHRONIZER WITH INTEGRATED 2.5-GHZ BULK-ACOUSTIC-WAVE VCO

Technical Specifications

Parameters and characteristics for this part

SpecificationLMK5B33414RGCT
Differential - Input:Output [custom]True
Differential - Input:Output [custom]True
Divider/MultiplierYes/No
Frequency - Max [Max]200 MHz, 1.25 GHz, 25 MHz, 400 MHz
InputLVDS, LVCMOS, HCSL, LVPECL, Crystal
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputLVCMOS, CML, LVDS, LVPECL
Package / Case64-VFQFN Exposed Pad
PLLTrue
Ratio - Input:Output [custom]4:14
Supplier Device Package64-VQFN (9x9)
Voltage - Supply [Max]3.465 V
Voltage - Supply [Min]3.135 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 53.33
10$ 50.10
25$ 48.48
100$ 44.92
Digi-Reel® 1$ 53.33
10$ 50.10
25$ 48.48
100$ 44.92
Tape & Reel (TR) 250$ 43.63
Texas InstrumentsSMALL T&R 1$ 48.96
100$ 43.52
250$ 35.78
1000$ 32.00

Description

General part information

LMK5B33414 Series

The LMK5B33414 is a high-performance network synchronizer and jitter cleaner designed to meet the stringent requirements of ethernet-based networking applications with < 5ns timing accuracy (ITU-T G.8273.2 Class D).

The device integrates three DPLLs and three APLLs to provide hitless switching and jitter attenuation with programmable loop bandwidth (LBW) and one external loop filter capacitor, maximizing flexibility and ease of use.

APLL3 features an ultra-high performance PLL with TI’s proprietary Bulk Acoustic Wave (BAW) technology in the VCO and can generate 312.5MHz output clocks with 42fs typical RMS jitter (12kHz to 20MHz) irrespective of the DPLL reference input frequency and jitter characteristics. APLL2 and APLL1 feature conventional LC VCOs to provide options for a second or third frequency and/or synchronization domain.