Specification	SN74AHCT74DBR

Clock Frequency	140 MHz
Current - Output High, Low [custom]	8 mA
Current - Output High, Low [custom]	8 mA
Current - Quiescent (Iq)	2 µA
Function	Reset, Set(Preset)
Input Capacitance	2 pF
Max Propagation Delay @ V, Max CL	8.8 ns
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	2
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Output Type	Complementary
Package / Case	5.3 mm
Package / Case	14-SSOP
Package / Case	0.209 "
Supplier Device Package	14-SSOP
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74AHCT74Q-Q1 Series

Automotive Catalog Dual Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset

Part	Trigger Type	Current - Quiescent (Iq)	Operating Temperature [Min]	Operating Temperature [Max]	Type	Number of Elements	Clock Frequency	Input Capacitance	Supplier Device Package	Package / Case	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Mounting Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Output Type	Function	Max Propagation Delay @ V, Max CL	Number of Bits per Element	Package / Case [custom]	Package / Case [custom]	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case [x]	Package / Case [y]	Qualification	Grade	Package / Case	Package / Case
Texas Instruments SN74AHCT74RGYR	Positive Edge	2 µA	-40 °C	125 °C	D-Type	2	140 MHz	2 pF	14-VQFN (3.5x3.5)	14-VFQFN Exposed Pad	8 mA	8 mA	Surface Mount	4.5 V	5.5 V	Complementary	Reset Set(Preset)	8.8 ns	1
Texas Instruments SN74AHCT74MPWREP	Positive Edge	2 µA			D-Type	2	140 MHz	2 pF	14-TSSOP	14-TSSOP	8 mA	8 mA	Surface Mount	4.5 V	5.5 V	Complementary	Reset Set(Preset)	8.8 ns	1	0.173 "	4.4 mm	125 °C	-55 °C
Texas Instruments SN74AHCT74BQAR	Positive Edge	2 µA	-40 °C	125 °C	D-Type	2	140 MHz	2 pF	14-WQFN (3x2.5)	14-WFQFN Exposed Pad	8 mA	8 mA	Surface Mount	4.5 V	5.5 V	Complementary	Reset Set(Preset)	8.8 ns	1
Texas Instruments SN74AHCT74DR	Positive Edge	2 µA	-40 °C	125 °C	D-Type	2	140 MHz	2 pF		14-SOIC	8 mA	8 mA	Surface Mount	4.5 V	5.5 V	Complementary	Reset Set(Preset)	8.8 ns	1					0.154 in	3.9 mm
Texas Instruments SN74AHCT74MDREP	Positive Edge	2 µA			D-Type	2	140 MHz	2 pF		14-SOIC	8 mA	8 mA	Surface Mount	4.5 V	5.5 V	Complementary	Reset Set(Preset)	8.8 ns	1			125 °C	-55 °C	0.154 in	3.9 mm
Texas Instruments SN74AHCT74QDRG4Q1	Positive Edge	2 µA	-40 °C	125 °C	D-Type	2	140 MHz	2 pF		14-SOIC	8 mA	8 mA	Surface Mount	4.5 V	5.5 V	Complementary	Reset Set(Preset)	8.8 ns	1					0.154 in	3.9 mm	AEC-Q100	Automotive
Texas Instruments SN74AHCT74PW	Positive Edge	2 µA	-40 °C	125 °C	D-Type	2	140 MHz	2 pF	14-TSSOP	14-TSSOP	8 mA	8 mA	Surface Mount	4.5 V	5.5 V	Complementary	Reset Set(Preset)	11.4 ns	1	0.173 "	4.4 mm
Texas Instruments SN74AHCT74DGVR	Positive Edge	2 µA	-40 °C	125 °C	D-Type	2	140 MHz	2 pF		14-TFSOP	8 mA	8 mA	Surface Mount	4.5 V	5.5 V	Complementary	Reset Set(Preset)	8.8 ns	1					0.173 in 4.4 mm
Texas Instruments SN74AHCT74PWRG4	Positive Edge	2 µA	-40 °C	125 °C	D-Type	2	140 MHz	2 pF	14-TSSOP	14-TSSOP	8 mA	8 mA	Surface Mount	4.5 V	5.5 V	Complementary	Reset Set(Preset)	8.8 ns	1	0.173 "	4.4 mm
Texas Instruments SN74AHCT74DBR	Positive Edge	2 µA	-40 °C	125 °C	D-Type	2	140 MHz	2 pF	14-SSOP	14-SSOP	8 mA	8 mA	Surface Mount	4.5 V	5.5 V	Complementary	Reset Set(Preset)	8.8 ns	1									5.3 mm	0.209 "

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.54
		10	$ 0.46
		25	$ 0.43
		100	$ 0.34
		250	$ 0.32
		500	$ 0.27
		1000	$ 0.21
	Digi-Reel®	1	$ 0.54
		10	$ 0.46
		25	$ 0.43
		100	$ 0.34
		250	$ 0.32
		500	$ 0.27
		1000	$ 0.21
	Tape & Reel (TR)	2000	$ 0.19
		6000	$ 0.18
		10000	$ 0.17
		50000	$ 0.15
Texas Instruments	LARGE T&R	1	$ 0.26
		100	$ 0.17
		250	$ 0.13
		1000	$ 0.09

Description

General part information

SN74AHCT74Q-Q1 Series

The ’AHCT74 dual positive-edge-triggered devices are D-type flip-flops.

A low level at the preset ( PRE) or clear ( CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

The ’AHCT74 dual positive-edge-triggered devices are D-type flip-flops.