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Integrated Circuits (ICs)

SN74AHCT74RGYR

Active
Texas Instruments

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

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14-VQFN
Integrated Circuits (ICs)

SN74AHCT74RGYR

Active
Texas Instruments

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74AHCT74RGYR
Clock Frequency140 MHz
Current - Output High, Low [custom]8 mA
Current - Output High, Low [custom]8 mA
Current - Quiescent (Iq)2 µA
FunctionReset, Set(Preset)
Input Capacitance2 pF
Max Propagation Delay @ V, Max CL8.8 ns
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements2
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Output TypeComplementary
Package / Case14-VFQFN Exposed Pad
Supplier Device Package14-VQFN (3.5x3.5)
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

SN74AHCT74Q-Q1 Series

Automotive Catalog Dual Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset

PartTrigger TypeCurrent - Quiescent (Iq)Operating Temperature [Min]Operating Temperature [Max]TypeNumber of ElementsClock FrequencyInput CapacitanceSupplier Device PackagePackage / CaseCurrent - Output High, Low [custom]Current - Output High, Low [custom]Mounting TypeVoltage - Supply [Min]Voltage - Supply [Max]Output TypeFunctionMax Propagation Delay @ V, Max CLNumber of Bits per ElementPackage / Case [custom]Package / Case [custom]Operating Temperature [Max]Operating Temperature [Min]Package / Case [x]Package / Case [y]QualificationGradePackage / CasePackage / Case
14-VQFN
Texas Instruments
Positive Edge
2 µA
-40 °C
125 °C
D-Type
2
140 MHz
2 pF
14-VQFN (3.5x3.5)
14-VFQFN Exposed Pad
8 mA
8 mA
Surface Mount
4.5 V
5.5 V
Complementary
Reset
Set(Preset)
8.8 ns
1
14-TSSOP
Texas Instruments
Positive Edge
2 µA
D-Type
2
140 MHz
2 pF
14-TSSOP
14-TSSOP
8 mA
8 mA
Surface Mount
4.5 V
5.5 V
Complementary
Reset
Set(Preset)
8.8 ns
1
0.173 "
4.4 mm
125 °C
-55 °C
WQFN (BQA)
Texas Instruments
Positive Edge
2 µA
-40 °C
125 °C
D-Type
2
140 MHz
2 pF
14-WQFN (3x2.5)
14-WFQFN Exposed Pad
8 mA
8 mA
Surface Mount
4.5 V
5.5 V
Complementary
Reset
Set(Preset)
8.8 ns
1
14-SOIC
Texas Instruments
Positive Edge
2 µA
-40 °C
125 °C
D-Type
2
140 MHz
2 pF
14-SOIC
8 mA
8 mA
Surface Mount
4.5 V
5.5 V
Complementary
Reset
Set(Preset)
8.8 ns
1
0.154 in
3.9 mm
14-SOIC
Texas Instruments
Positive Edge
2 µA
D-Type
2
140 MHz
2 pF
14-SOIC
8 mA
8 mA
Surface Mount
4.5 V
5.5 V
Complementary
Reset
Set(Preset)
8.8 ns
1
125 °C
-55 °C
0.154 in
3.9 mm
14-SOIC
Texas Instruments
Positive Edge
2 µA
-40 °C
125 °C
D-Type
2
140 MHz
2 pF
14-SOIC
8 mA
8 mA
Surface Mount
4.5 V
5.5 V
Complementary
Reset
Set(Preset)
8.8 ns
1
0.154 in
3.9 mm
AEC-Q100
Automotive
14-TSSOP
Texas Instruments
Positive Edge
2 µA
-40 °C
125 °C
D-Type
2
140 MHz
2 pF
14-TSSOP
14-TSSOP
8 mA
8 mA
Surface Mount
4.5 V
5.5 V
Complementary
Reset
Set(Preset)
11.4 ns
1
0.173 "
4.4 mm
14-TVSOP
Texas Instruments
Positive Edge
2 µA
-40 °C
125 °C
D-Type
2
140 MHz
2 pF
14-TFSOP
8 mA
8 mA
Surface Mount
4.5 V
5.5 V
Complementary
Reset
Set(Preset)
8.8 ns
1
0.173 in
4.4 mm
14-TSSOP
Texas Instruments
Positive Edge
2 µA
-40 °C
125 °C
D-Type
2
140 MHz
2 pF
14-TSSOP
14-TSSOP
8 mA
8 mA
Surface Mount
4.5 V
5.5 V
Complementary
Reset
Set(Preset)
8.8 ns
1
0.173 "
4.4 mm
SN74AC86D
Texas Instruments
Positive Edge
2 µA
-40 °C
125 °C
D-Type
2
140 MHz
2 pF
14-SSOP
14-SSOP
8 mA
8 mA
Surface Mount
4.5 V
5.5 V
Complementary
Reset
Set(Preset)
8.8 ns
1
5.3 mm
0.209 "

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.43
10$ 0.37
25$ 0.35
100$ 0.28
250$ 0.26
500$ 0.22
1000$ 0.17
Digi-Reel® 1$ 0.43
10$ 0.37
25$ 0.35
100$ 0.28
250$ 0.26
500$ 0.22
1000$ 0.17
Tape & Reel (TR) 3000$ 0.07
6000$ 0.07
Texas InstrumentsLARGE T&R 1$ 0.22
100$ 0.15
250$ 0.12
1000$ 0.08

Description

General part information

SN74AHCT74Q-Q1 Series

The ’AHCT74 dual positive-edge-triggered devices are D-type flip-flops.

A low level at the preset ( PRE) or clear ( CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

The ’AHCT74 dual positive-edge-triggered devices are D-type flip-flops.