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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ALS137ADR |
|---|---|
| Circuit | 1 x 3:8 |
| Current - Output High, Low [custom] | 400 µA |
| Current - Output High, Low [custom] | 8 mA |
| Independent Circuits | 1 |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Package / Case | 16-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Supplier Device Package | 16-SOIC |
| Type | Decoder/Demultiplexer |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
| Voltage Supply Source | Single Supply |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
SN74ALS137A Series
The SN54ALS137A, SN74ALS137A, and SN74AS137 are 3-line to 8-line decoders/demultiplexers with latches on the three address inputs. When the latch-enable () input is low, the devices act as decoders/demultiplexers. Whengoes from low to high, the address present at the select (A, B, and C) inputs is stored in the latches. Further address changes are ignored as long asremains high. The output-enable controls (G1 and G2\) control the outputs independently of the select or latch-enable inputs. All of the outputs are forced high if G1 is low or G2\ is high. These devices are ideally suited for implementing glitch-free decoders in strobed (stored-address) applications in bus-oriented systems.
The SN54ALS137A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS137A and SN74AS137 are characterized for operation from 0°C to 70°C.
The SN54ALS137A, SN74ALS137A, and SN74AS137 are 3-line to 8-line decoders/demultiplexers with latches on the three address inputs. When the latch-enable () input is low, the devices act as decoders/demultiplexers. Whengoes from low to high, the address present at the select (A, B, and C) inputs is stored in the latches. Further address changes are ignored as long asremains high. The output-enable controls (G1 and G2\) control the outputs independently of the select or latch-enable inputs. All of the outputs are forced high if G1 is low or G2\ is high. These devices are ideally suited for implementing glitch-free decoders in strobed (stored-address) applications in bus-oriented systems.
Documents
Technical documentation and resources
