LMK5C33216ARGCTS1
ActiveTHREE DPLL, THREE APLL, TWO-INPUT AND 16-OUTPUT NETWORK SYNCHRONIZER WITH BAW VCO IEEE-1588 SUPPORT
Deep-Dive with AI
Search across all available documentation for this part.
LMK5C33216ARGCTS1
ActiveTHREE DPLL, THREE APLL, TWO-INPUT AND 16-OUTPUT NETWORK SYNCHRONIZER WITH BAW VCO IEEE-1588 SUPPORT
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | LMK5C33216ARGCTS1 |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Divider/Multiplier | Yes/No |
| Frequency - Max [Max] | 200 MHz, 1.25 GHz, 650 MHz, 25 MHz |
| Input | Differential or Single-Ended |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 105 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVDS, LVPECL, HCSL, HSDS, LVCMOS |
| Package / Case | 64-VFQFN Exposed Pad |
| PLL | True |
| Ratio - Input:Output [custom] | 16 |
| Ratio - Input:Output [custom] | 2 |
| Supplier Device Package | 64-VQFN (9x9) |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 53.33 | |
| 10 | $ 50.10 | |||
| 25 | $ 48.48 | |||
| 100 | $ 44.92 | |||
| Digi-Reel® | 1 | $ 53.33 | ||
| 10 | $ 50.10 | |||
| 25 | $ 48.48 | |||
| 100 | $ 44.92 | |||
| Tape & Reel (TR) | 250 | $ 43.63 | ||
| Texas Instruments | SMALL T&R | 1 | $ 48.96 | |
| 100 | $ 43.52 | |||
| 250 | $ 35.78 | |||
| 1000 | $ 32.00 | |||
Description
General part information
LMK5C33216AS1 Series
The LMK5C33216AS1 is a high-performance network synchronizer and jitter cleaner designed to meet the stringent requirements of wireless communications and infrastructure applications.
The device is bundled with software support for IEEE-1588 PTP synchronization to a primary reference clock source. For more information, contact TI.
The device integrates three DPLLs and three APLLs to provide hitless switching and jitter attenuation with programmable loop bandwidth (LBW) and one external loop filter capacitor, maximizing flexibility and ease of use.
Documents
Technical documentation and resources
