
LAN89730AMR-A
ObsoleteUSB 2.0 TO 10/100 ETHERNET CONTROLLER 10MBPS/100MBPS 3.3V 56-PIN VQFN T/R
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LAN89730AMR-A
ObsoleteUSB 2.0 TO 10/100 ETHERNET CONTROLLER 10MBPS/100MBPS 3.3V 56-PIN VQFN T/R
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Technical Specifications
Parameters and characteristics for this part
| Specification | LAN89730AMR-A |
|---|---|
| Current - Supply | 30 mA |
| Function | USB to Ethernet, Bridge |
| Interface | USB |
| Operating Temperature (Max) | 85 °C |
| Operating Temperature (Min) | -40 °C |
| Package / Case | 56-VFQFN Exposed Pad |
| Package Length | 8 mm |
| Package Name | 56-VQFN |
| Package Width | 8 mm |
| Protocol | Ethernet |
| Standards | USB 2.0, 10/100 Base-T/TX PHY |
| Voltage - Supply | 3.3 V, 1.2 V |
| Voltage - Supply | 1.2V, 3.3V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | Updated |
|---|---|---|---|---|
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Description
General part information
LAN89730 Series
The LAN89730 is a high performance solution for USB to 10/100 Ethernet port bridging. With automotive applications ranging from diagnostics, fast software download, gateway services, in-vehicle engineering development, manufacturing test and legislated inspection interfaces, the device is targeted as a high-performance, low-cost USB/Ethernet connectivity solution. The LAN89730 contains an integrated 10/100 Ethernet PHY, HSIC interface, Hi-Speed USB 2.0 device controller, 10/100 Ethernet MAC, TAP controller, EEPROM controller, and a FIFO controller with a total of 30 kB of internal packet buffering. The internal USB 2.0 device controller is compliant with the USB 2.0 Hi-Speed standard. The HSIC interface is compliant with the High-Speed Interchip USB Electrical Specification Revision 1.0. HighSpeed Inter-Chip (HSIC) is a digital interconnect bus that enables the use of USB technology as a lowpower chip-to-chip interconnect at speeds up to 480 Mb/s. The device implements Control, Interrupt, Bulk-in and Bulk-out USB Endpoints. The Ethernet controller supports auto-negotiation, auto-polarity correction, HP Auto-MDIX, and is compliant with the IEEE 802.3 and 802.3u standards. An external MII interface provides support for an external Fast Ethernet PHY functionality. Multiple power management features are provided, including various low-power modes, and Magic Packet, Wake On LAN and Link Status Change wake events. These wake events can be programmed to initiate a USB remote wakeup. A PCI-like PME wake is also supported when the Host controller is disabled. An internal EEPROM controller exists to load various USB configuration information and the device MAC address. The integrated IEEE 1149.1 compliant TAP controller provides boundary scan via JTAG.USB Device Controller Fully compliant with Hi-Speed Universal Serial Bus Specification, revision 2.0 Supports HS (480 Mbps) Four Endpoints supported High-Performance 10/100 Ethernet Controller Fully compliant with IEEE 802.3/802.3u Integrated Ethernet MAC and PHY 10BASE-T and 100BASE-TX support Power and I/Os Various low power modes NetDetach feature increases battery life Miscellaneous Features EEPROM controller Supports custom operation without EEPROM Packaging 56-pin VQFN (8 x 8 mm), RoHS-compliant Environmental -40°C to +85°C temperature range
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