Specification	SN74ALVCH162841GR

Circuit	10:10
Current - Output High, Low [custom]	12 mA
Current - Output High, Low [custom]	12 mA
Delay Time - Propagation	1 ns
Independent Circuits	2
Logic Type	D-Type Transparent Latch
Mounting Type	Surface Mount
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State
Package / Case	6.1 mm
Package / Case	0.24 in
Package / Case	56-TFSOP
Supplier Device Package	56-TSSOP
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	1.65 V

SN74ALVCH162841 Series

20-Bit Bus-Interface D-Type Latch With 3-State Outputs

Part	Circuit	Mounting Type	Independent Circuits	Logic Type	Package / Case	Package / Case	Package / Case	Delay Time - Propagation	Voltage - Supply [Min]	Voltage - Supply [Max]	Output Type	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low [custom]	Current - Output High, Low [custom]
Texas Instruments SN74ALVCH162841GR	10:10	Surface Mount	2	D-Type Transparent Latch	6.1 mm	0.24 in	56-TFSOP	1 ns	1.65 V	3.6 V	Tri-State	56-TSSOP	85 °C	-40 °C	12 mA	12 mA
Texas Instruments SN74ALVCH162841DLR	10:10	Surface Mount	2	D-Type Transparent Latch	7.5 mm	0.295 in	56-BSSOP	1 ns	1.65 V	3.6 V	Tri-State	56-SSOP	85 °C	-40 °C	12 mA	12 mA

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 2.40
	Digi-Reel®	1	$ 2.40
	Tape & Reel (TR)	2000	$ 1.10
		4000	$ 1.10
		6000	$ 1.06
Texas Instruments	LARGE T&R	1	$ 1.80
		100	$ 1.49
		250	$ 1.07
		1000	$ 0.80

Description

General part information

SN74ALVCH162841 Series

This 20-bit bus-interface D-type latch is designed for 1.65-V to 3.6-V VCCoperation.

The SN74ALVCH162841 features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing buffer registers, unidirectional bus drivers, and working registers.

The SN74ALVCH162841 can be used as two 10-bit latches or one 20-bit latch. The 20 latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the D inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.

Documents

Technical documentation and resources

SN74ALVCH162841GR

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SN74ALVCH162841GR

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Technical Specifications

SN74ALVCH162841 Series

Pricing

Description

SN74ALVCH162841 Series

Documents

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Live Insertion

Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)

Understanding Advanced Bus-Interface Products Design Guide

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

CMOS Power Consumption and CPD Calculation (Rev. B)

An Overview of Bus-Hold Circuit and the Applications (Rev. B)

Logic Guide (Rev. AB)

TI IBIS File Creation, Validation, and Distribution Processes

TI SN74ALVC16835 Component Specification Analysis for PC100

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Power-Up Behavior of Clocked Devices (Rev. B)

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Standard Linear & Logic for PCs, Servers & Motherboards

SN74ALVCH162841 datasheet (Rev. E)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)

LOGIC Pocket Data Book (Rev. B)

Input and Output Characteristics of Digital Integrated Circuits

ALVC Advanced Low-Voltage CMOS Including SSTL, HSTL, And ALB (Rev. B)

SN74ALVCH162841 Series