STM32WB30CEU5ATR
ActiveULTRA-LOW-POWER DUAL CORE ARM CORTEX-M4 MCU 64 MHZ, CORTEX-M0+ 32 MHZ WITH 512 KBYTES OF FLASH MEMORY, BLUETOOTH LE 5.4, 802.15.4, ZIGBEE, THREAD, MATTER, AES-256
STM32WB30CEU5ATR
ActiveULTRA-LOW-POWER DUAL CORE ARM CORTEX-M4 MCU 64 MHZ, CORTEX-M0+ 32 MHZ WITH 512 KBYTES OF FLASH MEMORY, BLUETOOTH LE 5.4, 802.15.4, ZIGBEE, THREAD, MATTER, AES-256
Technical Specifications
Parameters and characteristics for this part
| Specification | STM32WB30CEU5ATR |
|---|---|
| Current - Receiving | 7.9 mA |
| Current - Transmitting [Max] [x] | 12 mA |
| Current - Transmitting [Min] [x] | 8.8 mA |
| Data Rate (Max) [Max] | 1 Mbps |
| GPIO | 30 |
| Memory Size | 1.5 Mb, 512 kB |
| Modulation | GFSK |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -10 °C |
| Package / Case | 48-UFQFN Exposed Pad |
| Power - Output | 4 dBm |
| Protocol | Bluetooth v5.4, Thread, Zigbee® |
| RF Family/Standard | 802.15.4, Bluetooth |
| Sensitivity | -100 dBm |
| Serial Interfaces | SPI, UART, I2C, USART |
| Supplier Device Package | 48-UFQFPN (7x7) |
| Type | TxRx + MCU |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 0 | $ 2.77 | |
Description
General part information
STM32WB30CE Series
The STM32WB50CG and STM32WB30CE multiprotocol wireless and ultra-low-power device embeds a powerful and ultra-low-power radio compliant with the Bluetooth®Low Energy SIG specification 5.4 or with IEEE 802.15.4-2011. It contains a dedicated Arm®Cortex®-M0+ for performing all the real-time low layer operation.
The devices are designed to be extremely low-power and are based on the high-performance Arm®Cortex®-M4 32-bit RISC core operating at a frequency of up to 64 MHz. This core features a Floating point unit (FPU) single precision that supports all Arm®single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) that enhances application security.
Enhanced inter-processor communication is provided by the IPCC with six bidirectional channels. The HSEM provides hardware semaphores used to share common resources between the two processors.
Documents
Technical documentation and resources