Integrated Circuits (ICs)

CY74FCT821BTSOC

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10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

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Search across all available documentation for this part.

DocumentsSelecting the Right Level Translation Solution (Rev. A)Semiconductor Packing Material Electrostatic Discharge (ESD) Protection +6

Integrated Circuits (ICs)

CY74FCT821BTSOC

Active

Texas Instruments

10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsSelecting the Right Level Translation Solution (Rev. A)Semiconductor Packing Material Electrostatic Discharge (ESD) Protection +6

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	CY74FCT821BTSOC

Current - Output High, Low [custom]	64 mA
Current - Output High, Low [custom]	32 mA
Current - Quiescent (Iq)	200 µA
Function	Standard
Input Capacitance	5 pF
Max Propagation Delay @ V, Max CL	15 ns
Mounting Type	Surface Mount
Number of Bits per Element	10
Number of Elements	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State, Non-Inverted
Package / Case	24-SOIC
Package / Case [custom]	7.5 mm
Package / Case [custom]	0.295 in
Supplier Device Package	24-SOIC
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	5.25 V
Voltage - Supply [Min]	4.75 V

CY74FCT821T Series

10-Bit Bus Interface Flip-Flops with 3-State Outputs

Part	Number of Bits per Element	Current - Quiescent (Iq)	Package / Case	Package / Case [custom]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Trigger Type	Supplier Device Package	Voltage - Supply [Min]	Voltage - Supply [Max]	Input Capacitance	Type	Function	Operating Temperature [Max]	Operating Temperature [Min]	Output Type	Max Propagation Delay @ V, Max CL	Number of Elements	Mounting Type	Package / Case [custom]	Package / Case	Package / Case
Texas Instruments CY74FCT821ATQCT	10	200 µA	24-SSOP	0.154 " 3.9 mm	64 mA	32 mA	Positive Edge	24-SSOP	4.75 V	5.25 V	5 pF	D-Type	Standard	85 °C	-40 °C	Non-Inverted Tri-State	6 ns	1	Surface Mount
Texas Instruments CY74FCT821ATSOCT	10	200 µA	24-SOIC	7.5 mm	64 mA	32 mA	Positive Edge	24-SOIC	4.75 V	5.25 V	5 pF	D-Type	Standard	85 °C	-40 °C	Non-Inverted Tri-State	20 ns	1	Surface Mount	0.295 in
Texas Instruments CY74FCT821ATSOC	10	200 µA	24-SOIC	7.5 mm	64 mA	32 mA	Positive Edge	24-SOIC	4.75 V	5.25 V	5 pF	D-Type	Standard	85 °C	-40 °C	Non-Inverted Tri-State	20 ns	1	Surface Mount	0.295 in
Texas Instruments CD74FCT821AEN
Texas Instruments CY74FCT821CTQC
Texas Instruments CY74FCT821CTSOC	10	200 µA	24-SOIC	7.5 mm	64 mA	32 mA	Positive Edge	24-SOIC	4.75 V	5.25 V	5 pF	D-Type	Standard	85 °C	-40 °C	Non-Inverted Tri-State	12.5 ns	1	Surface Mount	0.295 in
Texas Instruments CY74FCT821BTSOC	10	200 µA	24-SOIC	7.5 mm	64 mA	32 mA	Positive Edge	24-SOIC	4.75 V	5.25 V	5 pF	D-Type	Standard	85 °C	-40 °C	Non-Inverted Tri-State	15 ns	1	Surface Mount	0.295 in
Texas Instruments CY74FCT821BTPC	10	200 µA	24-DIP		64 mA	32 mA	Positive Edge	24-PDIP	4.75 V	5.25 V	5 pF	D-Type	Standard	85 °C	-40 °C	Non-Inverted Tri-State	6 ns	1	Through Hole		0.3 in	7.62 mm
Texas Instruments CY74FCT821BTSOCT	10	200 µA	24-SOIC	7.5 mm	64 mA	32 mA	Positive Edge	24-SOIC	4.75 V	5.25 V	5 pF	D-Type	Standard	85 °C	-40 °C	Non-Inverted Tri-State	15 ns	1	Surface Mount	0.295 in

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	1	$ 0.67
		10	$ 0.60
		25	$ 0.57
		100	$ 0.47
		250	$ 0.44
		500	$ 0.39
		1000	$ 0.36
Texas Instruments	TUBE	1	$ 0.71
		100	$ 0.55
		250	$ 0.40
		1000	$ 0.29

Description

General part information

CY74FCT821T Series

This bus-interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT821T is a 10-bit-wide buffered version of the popular CY74FCT374 function. This device is ideal for use as an output port requiring high IOL/IOH.

This device is designed for high-capacitance load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.

This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Documents

Technical documentation and resources

CY74FCT821BTSOC

Deep-Dive with AI

CY74FCT821BTSOC

Deep-Dive with AI

Technical Specifications

CY74FCT821T Series

Pricing

Description

CY74FCT821T Series

Documents

Selecting the Right Level Translation Solution (Rev. A)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Logic Guide (Rev. AB)

Advanced Bus Interface Logic Selection Guide

10-Bit Bus Interface Register With 3-State Outputs datasheet (Rev. B)

LOGIC Pocket Data Book (Rev. B)

CYFCT Parameter Measurement Information

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

CY74FCT821T Series