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LP2996LQ/NOPB
Integrated Circuits (ICs)

LP2995LQ/NOPB

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Texas Instruments

IC REGULATOR DDR TERM 16WQFN

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LP2996LQ/NOPB
Integrated Circuits (ICs)

LP2995LQ/NOPB

Active
Texas Instruments

IC REGULATOR DDR TERM 16WQFN

Technical Specifications

Parameters and characteristics for this part

SpecificationLP2995LQ/NOPB
ApplicationsDDR Terminator
Current - Supply250 µA
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]0 °C
Package / Case16-WFQFN Exposed Pad
Supplier Device Package16-WQFN (4x4)
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]2.2 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 1.39
10$ 1.24
25$ 1.18
100$ 0.97
250$ 0.90
500$ 0.80
Digi-Reel® 1$ 1.39
10$ 1.24
25$ 1.18
100$ 0.97
250$ 0.90
500$ 0.80
Tape & Reel (TR) 1000$ 0.52
Texas InstrumentsSMALL T&R 1$ 1.03
100$ 0.79
250$ 0.58
1000$ 0.42

Description

General part information

LP2995 Series

The LP2995 linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM termination. The LP2995 also incorporates a VSENSEpin to provide superior load regulation and a VREFoutput as a reference for the chipset and DDR DIMMS.

The LP2995 linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM termination. The LP2995 also incorporates a VSENSEpin to provide superior load regulation and a VREFoutput as a reference for the chipset and DDR DIMMS.