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Technical Specifications
Parameters and characteristics for this part
| Specification | SN65LVDS104DRG4 |
|---|---|
| Capacitance - Input | 3 pF |
| Current - Supply | 23 mA |
| Data Rate (Max) | 400 Mbps |
| Delay Time | 3.1 ns |
| Input | LVDS |
| Mounting Type | Surface Mount |
| Number of Channels [custom] | 1:4 |
| Number of Channels [custom] | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVDS |
| Package / Case | 16-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Supplier Device Package | 16-SOIC |
| Type | Multiplexer, Buffer |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3 V |
SN65LVDS104 Series
1:4 LVDS clock fanout buffer
| Part | Mounting Type | Output | Type | Package / Case [x] | Package / Case | Package / Case [y] | Input | Voltage - Supply [Max] | Voltage - Supply [Min] | Supplier Device Package | Number of Channels [custom] | Number of Channels [custom] | Capacitance - Input | Current - Supply | Delay Time | Operating Temperature [Max] | Operating Temperature [Min] | Data Rate (Max) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
 Texas Instruments | Surface Mount | LVDS | Buffer Multiplexer | 0.173 in | 16-TSSOP | 4.4 mm | LVDS | 3.6 V | 3 V | 16-TSSOP | 1:4 | 1 | 3 pF | 23 mA | 3.1 ns | 85 °C | -40 °C | 400 Mbps |
 Texas Instruments | Surface Mount | LVDS | Buffer Multiplexer | 0.154 in | 16-SOIC | 3.9 mm | LVDS | 3.6 V | 3 V | 16-SOIC | 1:4 | 1 | 3 pF | 23 mA | 3.1 ns | 85 °C | -40 °C | 400 Mbps |
Texas Instruments | Surface Mount | LVDS | Buffer Multiplexer | 0.154 in | 16-SOIC | 3.9 mm | LVDS | 3.6 V | 3 V | 16-SOIC | 1:4 | 1 | 3 pF | 23 mA | 3.1 ns | 85 °C | -40 °C | 400 Mbps |
Texas Instruments | Surface Mount | LVDS | Buffer Multiplexer | 0.154 in | 16-SOIC | 3.9 mm | LVDS | 3.6 V | 3 V | 16-SOIC | 1:4 | 1 | 3 pF | 23 mA | 3.1 ns | 85 °C | -40 °C | 400 Mbps |
Texas Instruments | Surface Mount | LVDS | Buffer Multiplexer | 0.173 in | 16-TSSOP | 4.4 mm | LVDS | 3.6 V | 3 V | 16-TSSOP | 1:4 | 1 | 3 pF | 23 mA | 3.1 ns | 85 °C | -40 °C | 400 Mbps |
Texas Instruments | Surface Mount | LVDS | Buffer Multiplexer | 0.173 in | 16-TSSOP | 4.4 mm | LVDS | 3.6 V | 3 V | 16-TSSOP | 1:4 | 1 | 3 pF | 23 mA | 3.1 ns | 85 °C | -40 °C | 400 Mbps |
Texas Instruments | Surface Mount | LVDS | Buffer Multiplexer | 0.154 in | 16-SOIC | 3.9 mm | LVDS | 3.6 V | 3 V | 16-SOIC | 1:4 | 1 | 3 pF | 23 mA | 3.1 ns | 85 °C | -40 °C | 400 Mbps |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 2500 | $ 2.63 | |
Description
General part information
SN65LVDS104 Series
The SN65LVDS10x are a differential line receiver and a LVTTL input (respectively) connected to four differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). LVDS, as specified in EIA/TIA-644 is a data signaling technique that offers low-power, low-noise coupling, and switching speeds to transmit data at relatively long distances. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics.)
The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. Having the drivers integrated into the same substrate, along with the low pulse skew of balanced signaling, allows extremely precise timing alignment of the signals repeated from the input. This is particularly advantageous in distribution or expansion of signals such as clock or serial data stream.
The SN65LVDS10x are characterized for operation from –40°C to 85°C.
Documents
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