Zenode.ai Logo
Beta
16 SOIC
Integrated Circuits (ICs)

SN65LVDS104DR

Active
Texas Instruments

1:4 LVDS CLOCK FANOUT BUFFER

Deep-Dive with AI

Search across all available documentation for this part.

16 SOIC
Integrated Circuits (ICs)

SN65LVDS104DR

Active
Texas Instruments

1:4 LVDS CLOCK FANOUT BUFFER

Technical Specifications

Parameters and characteristics for this part

SpecificationSN65LVDS104DR
Capacitance - Input3 pF
Current - Supply23 mA
Data Rate (Max)400 Mbps
Delay Time3.1 ns
InputLVDS
Mounting TypeSurface Mount
Number of Channels [custom]1:4
Number of Channels [custom]1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputLVDS
Package / Case16-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
Supplier Device Package16-SOIC
TypeMultiplexer, Buffer
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 5.24
10$ 4.70
25$ 4.45
100$ 3.85
250$ 3.65
500$ 3.28
1000$ 2.77
Digi-Reel® 1$ 5.24
10$ 4.70
25$ 4.45
100$ 3.85
250$ 3.65
500$ 3.28
1000$ 2.77
Tape & Reel (TR) 2500$ 2.63
Texas InstrumentsLARGE T&R 1$ 3.95
100$ 3.46
250$ 2.43
1000$ 1.96

Description

General part information

SN65LVDS104 Series

The SN65LVDS10x are a differential line receiver and a LVTTL input (respectively) connected to four differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). LVDS, as specified in EIA/TIA-644 is a data signaling technique that offers low-power, low-noise coupling, and switching speeds to transmit data at relatively long distances. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics.)

The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. Having the drivers integrated into the same substrate, along with the low pulse skew of balanced signaling, allows extremely precise timing alignment of the signals repeated from the input. This is particularly advantageous in distribution or expansion of signals such as clock or serial data stream.

The SN65LVDS10x are characterized for operation from –40°C to 85°C.