
SN74LVT8996PW
Active3.3-V ABT 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVER
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SN74LVT8996PW
Active3.3-V ABT 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVER
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LVT8996PW |
|---|---|
| Logic Type | Addressable Scan Ports |
| Mounting Type | Surface Mount |
| Number of Bits [custom] | 10 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 24-TSSOP |
| Package / Case | 0.173 in, 4.4 mm |
| Supplier Device Package | 24-TSSOP |
| Supply Voltage [Max] | 3.6 V |
| Supply Voltage [Min] | 2.7 VDC |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Arrow | N/A | 60 | $ 8.81 | |
| Digikey | Tube | 1 | $ 14.23 | |
| 10 | $ 13.08 | |||
| 60 | $ 12.53 | |||
| 120 | $ 11.04 | |||
| 300 | $ 10.50 | |||
| 540 | $ 9.82 | |||
| 1020 | $ 9.01 | |||
| Texas Instruments | TUBE | 1 | $ 12.53 | |
| 100 | $ 10.94 | |||
| 250 | $ 8.44 | |||
| 1000 | $ 7.55 | |||
Description
General part information
SN74LVT8996-EP Series
The 'LVT8996 10-bit addressable scan ports (ASP) are members of the Texas Instruments SCOPETMtestability integrated-circuit family. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of complex circuit assemblies. Unlike most SCOPETMdevices, the ASP is not a boundary-scannable device, rather, it applies TI's addressable-shadow-port technology to the IEEE Std 1149.1-1990 (JTAG) test access port (TAP) to extend scan access beyond the board level.
These devices are functionally equivalent to the 'ABT8996 ASPs. Additionally, they are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to interface to 5-V masters and/or targets.
Conceptually, the ASP is a simple switch that can be used to directly connect a set of multidrop primary TAP signals to a set of secondary TAP signals - for example, to interface backplane TAP signals to a board-level TAP. The ASP provides all signal buffering that might be required at these two interfaces. When primary and secondary TAPs are connected, only a moderate propagation delay is introduced - no storage/retiming elements are inserted. This minimizes the need for reformatting board-level test vectors for in-system use.
Documents
Technical documentation and resources