Specification	SN74AHCT573N

Circuit [custom]	8
Circuit [custom]	8
Current - Output High, Low [custom]	8 mA
Current - Output High, Low [custom]	8 mA
Delay Time - Propagation	1 ns
Independent Circuits	1
Logic Type	D-Type Transparent Latch
Mounting Type	Through Hole
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State
Package / Case	20-DIP
Package / Case	7.62 mm
Package / Case	0.3 in
Supplier Device Package	20-PDIP
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74AHCT573 Series

Octal Transparent D-Type Latches With 3-State Outputs

Part	Operating Temperature [Max]	Operating Temperature [Min]	Voltage - Supply [Min]	Voltage - Supply [Max]	Independent Circuits	Circuit [custom]	Circuit [custom]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Delay Time - Propagation	Supplier Device Package	Output Type	Package / Case	Package / Case [y]	Package / Case [y]	Mounting Type	Logic Type	Package / Case [x]	Package / Case	Package / Case
Texas Instruments SN74AHCT573DW	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-SOIC	Tri-State	20-SOIC	0.295 in	7.5 mm	Surface Mount	D-Type Transparent Latch
Texas Instruments SN74AHCT573PWRE4	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-TSSOP	Tri-State	20-TSSOP	4.4 mm		Surface Mount	D-Type Transparent Latch	0.173 in
Texas Instruments SN74AHCT573PW	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-TSSOP	Tri-State	20-TSSOP	4.4 mm		Surface Mount	D-Type Transparent Latch	0.173 in
Texas Instruments SN74AHCT573PWRG4	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-TSSOP	Tri-State	20-TSSOP	4.4 mm		Surface Mount	D-Type Transparent Latch	0.173 in
Texas Instruments SN74AHCT573DWR	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-SOIC	Tri-State	20-SOIC	0.295 in	7.5 mm	Surface Mount	D-Type Transparent Latch
Texas Instruments SN74AHCT573N	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-PDIP	Tri-State	20-DIP			Through Hole	D-Type Transparent Latch		7.62 mm	0.3 in
Texas Instruments SN74AHCT573DBR	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-SSOP	Tri-State	20-SSOP			Surface Mount	D-Type Transparent Latch
Texas Instruments SN74AHCT573NSR	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-SO	Tri-State	20-SOIC			Surface Mount	D-Type Transparent Latch		5.3 mm	0.209 "
Texas Instruments SN74AHCT573DWRG4	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-SOIC	Tri-State	20-SOIC	0.295 in	7.5 mm	Surface Mount	D-Type Transparent Latch

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	1	$ 0.87
		20	$ 0.76
		40	$ 0.72
		100	$ 0.59
		260	$ 0.54
		500	$ 0.46
		1000	$ 0.37
		2500	$ 0.34
		5000	$ 0.31
Texas Instruments	TUBE	1	$ 0.73
		100	$ 0.50
		250	$ 0.38
		1000	$ 0.26

Description

General part information

SN74AHCT573 Series

The SNx4AHCT573 devices are octal transparent D-type latches. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs.

Documents

Technical documentation and resources

SNx4AHCT573 Octal Transparent D-Type Latches With 3-State Outputs datasheet (Rev. Q)

Data sheet

TI IBIS File Creation, Validation, and Distribution Processes

Application note

How to Select Little Logic (Rev. A)

Application note

Texas Instruments Little Logic Application Report

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Live Insertion

Application note

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

SN74AHCT573N

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SN74AHCT573N

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Technical Specifications

SN74AHCT573 Series

Pricing

Description

SN74AHCT573 Series

Documents

Implications of Slow or Floating CMOS Inputs (Rev. E)

LOGIC Pocket Data Book (Rev. B)

CMOS Power Consumption and CPD Calculation (Rev. B)

Design Summary for WCSP Little Logic (Rev. B)

Logic Guide (Rev. AB)

Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)

AHC/AHCT Designer's Guide February 2000 (Rev. D)

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Power-Up Behavior of Clocked Devices (Rev. B)

Little Logic Guide 2018 (Rev. G)

Selecting the Right Level Translation Solution (Rev. A)

Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)

SNx4AHCT573 Octal Transparent D-Type Latches With 3-State Outputs datasheet (Rev. Q)

TI IBIS File Creation, Validation, and Distribution Processes

How to Select Little Logic (Rev. A)

Texas Instruments Little Logic Application Report

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Live Insertion

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

SN74AHCT573 Series