Specification	SN74AHCT573DWR

Circuit [custom]	8
Circuit [custom]	8
Current - Output High, Low [custom]	8 mA
Current - Output High, Low [custom]	8 mA
Delay Time - Propagation	1 ns
Independent Circuits	1
Logic Type	D-Type Transparent Latch
Mounting Type	Surface Mount
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State
Package / Case	20-SOIC
Package / Case [y]	0.295 in
Package / Case [y]	7.5 mm
Supplier Device Package	20-SOIC
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74AHCT573 Series

Octal Transparent D-Type Latches With 3-State Outputs

Part	Operating Temperature [Max]	Operating Temperature [Min]	Voltage - Supply [Min]	Voltage - Supply [Max]	Independent Circuits	Circuit [custom]	Circuit [custom]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Delay Time - Propagation	Supplier Device Package	Output Type	Package / Case	Package / Case [y]	Package / Case [y]	Mounting Type	Logic Type	Package / Case [x]	Package / Case	Package / Case
Texas Instruments SN74AHCT573DW	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-SOIC	Tri-State	20-SOIC	0.295 in	7.5 mm	Surface Mount	D-Type Transparent Latch
Texas Instruments SN74AHCT573PWRE4	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-TSSOP	Tri-State	20-TSSOP	4.4 mm		Surface Mount	D-Type Transparent Latch	0.173 in
Texas Instruments SN74AHCT573PW	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-TSSOP	Tri-State	20-TSSOP	4.4 mm		Surface Mount	D-Type Transparent Latch	0.173 in
Texas Instruments SN74AHCT573PWRG4	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-TSSOP	Tri-State	20-TSSOP	4.4 mm		Surface Mount	D-Type Transparent Latch	0.173 in
Texas Instruments SN74AHCT573DWR	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-SOIC	Tri-State	20-SOIC	0.295 in	7.5 mm	Surface Mount	D-Type Transparent Latch
Texas Instruments SN74AHCT573N	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-PDIP	Tri-State	20-DIP			Through Hole	D-Type Transparent Latch		7.62 mm	0.3 in
Texas Instruments SN74AHCT573DBR	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-SSOP	Tri-State	20-SSOP			Surface Mount	D-Type Transparent Latch
Texas Instruments SN74AHCT573NSR	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-SO	Tri-State	20-SOIC			Surface Mount	D-Type Transparent Latch		5.3 mm	0.209 "
Texas Instruments SN74AHCT573DWRG4	85 °C	-40 °C	4.5 V	5.5 V	1	8	8	8 mA	8 mA	1 ns	20-SOIC	Tri-State	20-SOIC	0.295 in	7.5 mm	Surface Mount	D-Type Transparent Latch

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.56
		10	$ 0.48
		25	$ 0.45
		100	$ 0.36
		250	$ 0.33
		500	$ 0.28
		1000	$ 0.22
	Digi-Reel®	1	$ 0.56
		10	$ 0.48
		25	$ 0.45
		100	$ 0.36
		250	$ 0.33
		500	$ 0.28
		1000	$ 0.22
	Tape & Reel (TR)	2000	$ 0.20
		6000	$ 0.19
		10000	$ 0.17
		50000	$ 0.16
Texas Instruments	LARGE T&R	1	$ 0.44
		100	$ 0.30
		250	$ 0.23
		1000	$ 0.15

Description

General part information

SN74AHCT573 Series

The SNx4AHCT573 devices are octal transparent D-type latches. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs.

Documents

Technical documentation and resources

SNx4AHCT573 Octal Transparent D-Type Latches With 3-State Outputs datasheet (Rev. Q)

Data sheet

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)

Product overview

Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)

Application note

Logic Guide (Rev. AB)

Selection guide

SN74AHCT573DWR

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SN74AHCT573DWR

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Technical Specifications

SN74AHCT573 Series

Pricing

Description

SN74AHCT573 Series

Documents

How to Select Little Logic (Rev. A)

Power-Up Behavior of Clocked Devices (Rev. B)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Live Insertion

Selecting the Right Level Translation Solution (Rev. A)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

TI IBIS File Creation, Validation, and Distribution Processes

Little Logic Guide 2018 (Rev. G)

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Implications of Slow or Floating CMOS Inputs (Rev. E)

CMOS Power Consumption and CPD Calculation (Rev. B)

Texas Instruments Little Logic Application Report

AHC/AHCT Designer's Guide February 2000 (Rev. D)

LOGIC Pocket Data Book (Rev. B)

Design Summary for WCSP Little Logic (Rev. B)

SNx4AHCT573 Octal Transparent D-Type Latches With 3-State Outputs datasheet (Rev. Q)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)

Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)

Logic Guide (Rev. AB)

SN74AHCT573 Series