Part	Operating Temperature [Max]	Operating Temperature [Min]	Number of Inputs	Features	Reference Type	Configuration	Voltage - Supply, Digital [Min]	Voltage - Supply, Digital [Max]	Mounting Type	Input Type	Sampling Rate (Per Second)	Package / Case	Ratio - S/H:ADC	Data Interface	Voltage - Supply, Analog [Min]	Voltage - Supply, Analog [Max]	Architecture	Number of A/D Converters	Number of Bits	Supplier Device Package
Texas Instruments ADS42LB49IRGC25	85 °C	-40 °C	2	Simultaneous Sampling	Internal	S/H-ADC	1.7 V	1.9 V	Surface Mount	Differential	250 M	64-VFQFN Exposed Pad	1:1	LVDS - Parallel	3.15 V	3.45 V	Pipelined	2	14	64-VQFN (9x9)
Texas Instruments ADS42LB49IRGCT	85 °C	-40 °C	2	Simultaneous Sampling	Internal	S/H-ADC	1.7 V	1.9 V	Surface Mount	Differential	250 M	64-VFQFN Exposed Pad	1:1	LVDS - Parallel	1.7 V	1.9 V	Pipelined	2	12 bits	64-VQFN (9x9)
Texas Instruments ADS42LB49IRGCR									Surface Mount			64-VFQFN Exposed Pad								64-VQFN (9x9)

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tape & Reel (TR)	2000	$ 151.25
Texas Instruments	LARGE T&R	1	$ 140.36
		100	$ 127.05
		250	$ 123.42
		1000	$ 121.00

Description

General part information

ADS42LB49 Series

The ADS42LB49 and ADS42LB69 are a family of high-linearity, dual-channel, 14- and 16-bit,250-MSPS, analog-to-digital converters (ADCs) supporting DDR and QDR LVDS output interfaces. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. A sampling clock divider allows more flexibility for system clock architecture design. The ADS42LBx9 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with low-power consumption.

Documents

Technical documentation and resources

TI and Altera Ease Design Process with Compatible Evaluation Tools

More literature

ADS42LBx9EVM User’s Guide (Rev. A)

User guide

ADS42LBx9 14- and 16-Bit, 250-MSPS, Analog-to-Digital Converters datasheet (Rev. F)

Data sheet

Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)

Application note

Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)

Application note

Correcting the Low-Frequency Response of the ADS42LBxx, ADS42JBxx for Time-Domai

Application note

Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide)

User guide