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64-QFN
Integrated Circuits (ICs)

ADS42LB49IRGCT

Active
Texas Instruments

DUAL-CHANNEL, 14-BIT, 250-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC)

64-QFN
Integrated Circuits (ICs)

ADS42LB49IRGCT

Active
Texas Instruments

DUAL-CHANNEL, 14-BIT, 250-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC)

Technical Specifications

Parameters and characteristics for this part

SpecificationADS42LB49IRGCT
ArchitecturePipelined
ConfigurationS/H-ADC
Data InterfaceLVDS - Parallel
FeaturesSimultaneous Sampling
Input TypeDifferential
Mounting TypeSurface Mount
Number of A/D Converters2
Number of Bits12 bits
Number of Inputs2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case64-VFQFN Exposed Pad
Ratio - S/H:ADC1:1
Reference TypeInternal
Sampling Rate (Per Second)250 M
Supplier Device Package64-VQFN (9x9)
Voltage - Supply, Analog [Max]1.9 V
Voltage - Supply, Analog [Min]1.7 V
Voltage - Supply, Digital [Max]1.9 V
Voltage - Supply, Digital [Min]1.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 176.41
Digi-Reel® 1$ 176.41
Tape & Reel (TR) 250$ 159.01
Texas InstrumentsSMALL T&R 1$ 142.68
100$ 129.15
250$ 125.46
1000$ 123.00

Description

General part information

ADS42LB49 Series

The ADS42LB49 and ADS42LB69 are a family of high-linearity, dual-channel, 14- and 16-bit,250-MSPS, analog-to-digital converters (ADCs) supporting DDR and QDR LVDS output interfaces. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. A sampling clock divider allows more flexibility for system clock architecture design. The ADS42LBx9 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with low-power consumption.

The ADS42LB49 and ADS42LB69 are a family of high-linearity, dual-channel, 14- and 16-bit,250-MSPS, analog-to-digital converters (ADCs) supporting DDR and QDR LVDS output interfaces. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. A sampling clock divider allows more flexibility for system clock architecture design. The ADS42LBx9 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with low-power consumption.