Discrete Semiconductor Products

STB36NF06LT4

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STMicroelectronics

N-CHANNEL 60V - 0.032OHM - 30A - D2PAK STRIPFET(TM) II POWER MOSFET

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DocumentsSTB36NF06LT4 | Datasheet UM1575 +13

Discrete Semiconductor Products

STB36NF06LT4

Active

STMicroelectronics

N-CHANNEL 60V - 0.032OHM - 30A - D2PAK STRIPFET(TM) II POWER MOSFET

Deep-Dive with AI

DocumentsSTB36NF06LT4 | Datasheet UM1575 +13

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	STB36NF06LT4

Current - Continuous Drain (Id) @ 25°C	30 A
Drain to Source Voltage (Vdss)	60 V
Drive Voltage (Max Rds On, Min Rds On)	10 V, 5 V
FET Type	N-Channel
Gate Charge (Qg) (Max) @ Vgs [Max]	17 nC
Mounting Type	Surface Mount
Operating Temperature [Max]	175 °C
Operating Temperature [Min]	-55 °C
Package / Case	D2PAK (2 Leads + Tab), TO-263-3, TO-263AB
Power Dissipation (Max) [Max]	70 W
Rds On (Max) @ Id, Vgs	40 mOhm
Supplier Device Package	D2PAK
Technology	MOSFET (Metal Oxide)
Vgs (Max)	18 V
Vgs(th) (Max) @ Id	2.5 V

STB36NF06L Series

N-channel 60V - 0.032Ohm - 30A - D2PAK STripFET(TM) II Power MOSFET

Part	FET Type	Drive Voltage (Max Rds On, Min Rds On)	Operating Temperature [Max]	Operating Temperature [Min]	Vgs (Max)	Gate Charge (Qg) (Max) @ Vgs [Max]	Rds On (Max) @ Id, Vgs	Technology	Supplier Device Package	Power Dissipation (Max) [Max]	Mounting Type	Vgs(th) (Max) @ Id	Package / Case	Current - Continuous Drain (Id) @ 25°C	Drain to Source Voltage (Vdss)
STMicroelectronics STB36NF06LT4	N-Channel	5 V 10 V	175 °C	-55 °C	18 V	17 nC	40 mOhm	MOSFET (Metal Oxide)	D2PAK	70 W	Surface Mount	2.5 V	D2PAK (2 Leads + Tab) TO-263-3 TO-263AB	30 A	60 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	N/A	652	$ 2.19

Description

General part information

STB36NF06L Series

This Power MOSFET is the latest development of STMicroelectronics unique "Single Feature Size™" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.