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64-TQFP
Integrated Circuits (ICs)

ATMEGA325P-20AUR

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Microchip Technology

20MHZ, TQFP, IND TEMP, GREEN, 5V, T&R 64 TQFP 14X14X1MM T/R ROHS COMPLIANT: YES

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64-TQFP
Integrated Circuits (ICs)

ATMEGA325P-20AUR

Active
Microchip Technology

20MHZ, TQFP, IND TEMP, GREEN, 5V, T&R 64 TQFP 14X14X1MM T/R ROHS COMPLIANT: YES

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Technical Specifications

Parameters and characteristics for this part

SpecificationATMEGA325P-20AUR
ConnectivitySPI, USI, UART/USART
Core ProcessorAVR
Core Size8-Bit
Data Converters [custom]8
Data Converters [custom]10
Mounting TypeSurface Mount
Number of I/O54
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Oscillator TypeInternal
Package / Case64-TQFP
Program Memory Size32 KB
Program Memory TypeFLASH
RAM Size2K x 8
Speed20 MHz
Supplier Device Package64-TQFP
Voltage - Supply (Vcc/Vdd) [Max]5.5 V
Voltage - Supply (Vcc/Vdd) [Min]2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 6.28
25$ 5.76
100$ 5.21
Digi-Reel® 1$ 6.28
25$ 5.76
100$ 5.21
Tape & Reel (TR) 1000$ 5.21
Microchip DirectT/R 1$ 6.28
25$ 5.76
100$ 5.21
1000$ 4.80
5000$ 4.56
NewarkEach (Supplied on Full Reel) 100$ 5.37

Description

General part information

ATmega325PA Series

The high-performance, low-power Microchip 8-bit AVR® RISC-based microcontroller combines 32 KB ISP Flash memory with read-while-write capabilities, 1 KB EEPROM, 2 KB SRAM, 54/69 general purpose I/O lines, 32 general purpose working registers, a JTAG interface for boundary-scan and on-chip debugging/programming, three flexible timer/counters with compare modes, internal and external interrupts, serial programmable USART, a universal serial interface (USI) with start condition detector, an 8-channel 10-bit A/D converter, programmable watchdog timer with internal oscillator, SPI serial port, and five software selectable power saving modes. The device operates between 1.8-5.5 volts.

By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching one MIPS per MHz, balancing power consumption and processing speed.