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8V79S674 - Block Diagram
Integrated Circuits (ICs)

8V79S674NLGI

Obsolete
Renesas Electronics Corporation

DIFFERENTIAL-TO-3.3V, 2.5V LVPECL CLOCK DIVIDER AND FANOUT BUFFER

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8V79S674 - Block Diagram
Integrated Circuits (ICs)

8V79S674NLGI

Obsolete
Renesas Electronics Corporation

DIFFERENTIAL-TO-3.3V, 2.5V LVPECL CLOCK DIVIDER AND FANOUT BUFFER

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

Specification8V79S674NLGI
Differential - Input:Output [custom]True
Differential - Input:Output [custom]True
Frequency - Max [Max]2.5 GHz
InputLVCMOS, LVTTL
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputLVPECL
Package / Case20-VFQFN Exposed Pad
Ratio - Input:Output1:4
Supplier Device Package20-VFQFPN (4x4)
TypeDivider, Fanout Buffer (Distribution)
Voltage - Supply [Max]2.625 V, 3.465 V
Voltage - Supply [Min]2.375 V, 3.135 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

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Description

General part information

8V79S674 Series

The 8V79S674 is a clock divider and fanout buffer designed for clock signal division in wireless base station radio equipment boards. The device is optimized to deliver excellent additive phase jitter performance. The 8V79S674 uses SiGe technology for an optimum of high clock frequency and low phase noise performance, combined with high power supply noise rejection. It offers the frequency division by ÷1, ÷2, ÷4 and ÷8. Four low-skew LVPECL outputs are available and support clock output frequencies up to 2.5GHz (÷1 frequency division). Outputs can be disabled to save power consumption if not used. The device is packaged in a lead-free (RoHS 6) 20-lead VFQFN package. The extended temperature range supports wireless infrastructure, telecommunication, and networking end equipment requirements.

Documents

Technical documentation and resources